8 Write Sequence

In order to program the AT25128B/AT25256B, two separate instructions must be executed. First, the device must be write enabled via the Write Enable (WREN) instruction. Then, one of the two possible write sequences described in this section may be executed.

Note: If the WP pin is brought low or the device is not Write Enabled (WREN), the device will ignore the WRITE instruction and will return to the standby state when CS is brought high. A new CS assertion is required to re-initiate communication.

The address of the memory location(s) to be programmed must be outside the protected address field location selected by the block write protection level. During an internal write cycle, all commands will be ignored except the RDSR instruction. Refer to Table 8-1 for the AT25128B/AT25256B address bits.

Table 8-1. AT25128B/AT25256B Address Bits
Address	AT25128B	AT25256B
A_N	A₁₃-A₀	A₁₄-A₀
Don’t Care Bits	A₁₅-A₁₄	A₁₅