5.2.1 MAC Frame Transmit Data Block Header

The following table depicts the breakdown of the 32-bit transmit data block header.

Table 5-2. Transmit Data Block Header Format
Bit	31	30	29	28	27	26	25	24
	DNC=1	SEQ	NORX	0	0	0	0	0

Bit	23	22	21	20	19	18	17	16
	VS		DV	SV	SWO

Bit	15	14	13	12	11	10	9	8
	0	EV	EBO

Bit	7	6	5	4	3	2	1	0
	TSC		0	0	0	0	0	P

Bit 31 - DNC

Data, Not Control - Flag indicating the type of transaction, data or control.


0	Control (register read/write)
1	Data (Ethernet frame)

Note: The DNC bit is always set to indicate an Ethernet data transaction.

Bit 30 - SEQ

Data Block Sequence - Indication of data block (chunk) sequence (even or odd). This bit is ignored by the LAN8650/1.

Bit 29 - NORX

No Receive - The host MCU will set this bit to indicate to the LAN8650/1 that it will ignore any receive Ethernet frame data sent on SDO during this data block.

Bits 23:22 - VS

Vendor Specific - This field is reserved for future use. The host MCU shall set these bits to zero.

Bit 21 - DV

Data Valid - The host MCU sets this bit to indicate to the LAN8650/1 that valid Ethernet frame data is being transferred within the data block payload.

Bit 20 - SV

Start Valid - This bit is set by the host MCU to indicate that the beginning of an Ethernet frame is contained within the data block payload. The beginning of the frame is located by the Start Word Offset (SWO) field. The SV bit is ignored if the Data Valid bit is ‘0’.

Bits 19:16 - SWO

Start Word Offset - This field indicates which 32-bit word of the data block payload contains the first word of a new Ethernet frame. This field is ignored when Data Valid or Start Valid bits are ‘0’.

Bit 14 - EV

End Valid - This bit is set by the host MCU to indicate that the end of an Ethernet frame is contained within the data block payload. The end of the frame is located by the End Byte Offset (EBO) field. The EV bit is ignored if the Data Valid bit is ‘0’.

Bits 13:8 - EBO

End Byte Offset - This field indicated which byte of the data block payload contains the last byte of the end of an Ethernet frame. This field is ignored when Data Valid or End Valid bits are ‘0’.

Bits 7:6 - TSC

Time Stamp Capture - The SPI host may use this field to indicate to the LAN8650/1 to capture the egress timestamp of an Ethernet frame into the specified timestamp capture register.

Note: This field is ignored when frame timestamping is disabled in the Frame Timestamp Enable (FTSE) bit of the Configuration 0 (OA_CONFIG0) register. This field is ignored in all other conditions except when the Data Valid (DV) and Start Valid (SV) bits are both set to ‘1’ to indicate the beginning of a new Ethernet frame transfer.


00	Do not capture frame egress timestamp
01	Capture frame egress timestamp into Transmit Timestamp Capture Register A (TTSCA)
10	Capture frame egress timestamp into Transmit Timestamp Capture Register B (TTSCB)
11	Capture frame egress timestamp into Transmit Timestamp Capture Register C (TTSCC)

Bit 0 - P

Parity - Parity bit over bits 31:1 of the transmit data header field. This field is set such that there is an odd total number of bits set within the header.