5.1.2 Nonvolatile Memory

The PIC16F, PIC18F and PIC32CM MCUs feature a Nonvolatile Memory Module/Controller (NVM/NVMCTRL) that manages access to on-chip Flash memory and other nonvolatile memory regions. Both MCUs support in-system programming, self-programming, bootloader support, and configurable memory protection for secure code and data storage. Both controllers are designed for reliable program and data storage, with mechanisms for memory protection and flexible access. The following table provides a comparison of the features of PIC16F, PIC18F, and PIC32CM.

Table 5-4. PIC16F, PIC18F, and PIC32CM NVM Control Features
FeaturePIC16F NVMPIC18F NVMPIC32CM NVMCTRL
Bus InterfaceDedicated SFRs (NVMREG, EE)Dedicated SFRs (NVMREG)

32-bit Advanced High-performance Bus (AHB) for memory read/write

32-bit Advanced Peripheral Bus (APB) for memory control

Flash MemoryProgram Flash Memory (PFM)Program Flash Memory (PFM)Main Flash array
EEPROMSeparate Data EEPROM block (DFM)Separate Data EEPROM block (DFM)EEPROM emulation (RWWEE)
Memory Protection

Code protection

Block write protection

Code protection

Block write protection

Table read protection

Boot, 16 individually protected regions
Signature Row/Device IDConfiguration Memory space/Device Information Area (Device ID, Revision ID)Configuration Memory space/Device Information Area (Device ID, Revision ID)Memory-mapped to AHB
User RowMapped to PFMMapped to PFMMemory-mapped to AHB
Wait State ConfigurationFixedFixed or programmableProgrammable
CacheN/AN/ADirect-mapped cache
Power ManagementSupportedSupported

Flash block power-down in sleep

Wake up on access

Security Bit/Device Lock

Code Protection (CP/CPD)

Configuration bits

Code Protection (CP/CPD)

Configuration bits

Security bit, device protection
Access in Sleep ModesSleep, Idle, Doze (RAM accessible in sleep, Flash not accessible)Sleep, Idle, Doze (RAM accessible in sleep, Flash not accessible)Wake up on access or exit from sleep