5.1.1 Clock Selection
The PIC16F, PIC18F, and PIC32CM MCUs offer flexible and robust clock systems that support multiple internal and external clock sources, programmable prescalers, and safe run-time switching. The PIC16F, PIC18F, and PIC32CM MCUs allow peripherals to request and receive clocks as needed, support low-frequency and high-frequency oscillators, and provide mechanisms for clock accuracy tuning and failure detection. The main clock can be prescaled, and peripherals can operate either synchronously or asynchronously with respect to the main clock. These features enable efficient power management, high performance, and reliable operation across a wide range of applications.
The primary difference between the PIC16F, PIC18F, and PIC32CM MCUs is in the way clock management is integrated within the MCU. The PIC16F and PIC18F MCUs use the device configuration bits and an Oscillator Module (OSC), while the PIC32CM MCUs (depending on the family of devices) use a Clock System that uses a combination of the Generic Clock Controller (GCLK), Main Clock Controller (MCLK), System Controller (SYSCTRL), Oscillator Controllers (OSCCTRL, OSC32KCTRL), and Power Manager (PM). The following table provides a comparison of features of the PIC16F, PIC18F and PIC32CM. MCUs.
| Feature | PIC16F Oscillator Module (OSC) | PIC18F Oscillator Module (OSC) | PIC32CM Clock System (GCLK, MCLK, SYSCTRL, OSCCTRLs, PM) |
|---|---|---|---|
| Main Clock Source | Selectable internal/external FOSC up to 32 MHz | Selectable internal/external FOSC up to 64 MHz | Selectable through GCLK Up to 48 MHz OSC48M, 96 MHz FDPLL |
| Internal Oscillators | HFINTOSC (up to 16 MHz) MFINTOSC (500 kHz) LFINTOSC (31 kHz) ADCRC (Dedicated for ADC) | HFINTOSC (up to 64 MHz) MFINTOSC (500 kHz) LFINTOSC (31 kHz) ADCRC (dedicated for ADC) | OSC8M OSC48M OSC32K, OSCULP32K |
| External Oscillators | LP, XT, HS EC, RC/EXTRC, SOSC | LP, XT, HS, HSPLL EC, RC, SOSC | 0.4-32 MHz XOSC, 32.768 kHz XOSC32K External clock |
| PLL/DFLL/DPLL | 4x PLL | 4x PLL | DFLL48M (48 MHz) FDPLL96M (48-96 MHz) |
| Clock Distribution | FOSC,
CLKOUT, CLKREF | FOSC,
CLKOUT, CLKREF | GCLK and peripheral channels |
| Prescaler Range | 1x to 512x | 1x to 256x | 1x to 128x (GCLK, MCLK) |
| Clock Domains | Primary OSC Secondary OSC Internal OSC Block | Primary OSC Secondary OSC Internal OSC Block | Core, AHB, multiple APBxNote 1 Per-peripheral domains |
| Safe Run-Time Switching | Supported (IESO/TSSU) | Supported (CSWEN, IESO) | Supported (GCLK, MCLK) |
| Clock Gating/Masking | Supported in low-power modes (Sleep, Idle, PMD) | Supported in low-power modes (Sleep, Idle, PMD) | Module-level clock gating through masks |
| Clock Failure Detection | Fail-Safe Clock Monitor (FSCM) | Fail-Safe Clock Monitor (FSCM) | Automatic detection |
| Calibration/Auto-Tuning | Factory-calibrated Manual tuning | Factory-calibrated Manual/auto-tuning | Factory calibration fine tuning |
| Power Management Integration | Integrated in low-power modes | Integrated in low-power modes | Power domain gating wake-up on clock events |
| Brown-out Detector | Supported (BOR) | Supported (BOR) | BOD33 integrated can trigger wake-up |
- AHB (Advanced High-performance Bus) and APB (Advanced Peripheral Bus) are two types of internal bus architectures used in Arm-based microcontrollers. These buses are used to connect the CPU, memory, and peripherals.