7.7.4 Interrupt Flags

Note: This register has no accompanying INTCTRL register since all flags are registered as NMIs, which are always enabled.

Note: This register is under Configuration Change Protection since the interrupt flags may indicate a hardware error and are considered more severe than ordinary interrupt flags.

Name:	INTFLAGS
Offset:	0x6
Reset:	0xXX
Property:	Configuration Change Protection


Bit	7	6	5	4	3	2	1	0
						SPLIM		OPC
Access						R/W		R/W
Reset						x		x

Bit 2 – SPLIM Stack Pointer Limit Error

This flag is set when the stack pointer limit is exceeded. In other words, when the stack has overflowed or underflowed.

Write this bit to ‘1’ to clear the flag.

The CPU interrupt request will be asserted when this flag is set.

Bit 0 – OPC Illegal Opcode Error

This flag is set when an illegal opcode has been fetched and decoded.

Write this bit to ‘1’ to clear the flag.

The CPU interrupt request will be asserted when this flag is set.

This register has no accompanying INTCTRL register since all flags are registered as NMIs, which are always enabled. This register is under Configuration Change Protection since the interrupt flags may indicate a hardware error and are considered more severe than ordinary interrupt flags.