25.3.3.2.4 Double-Speed Operation

Double-speed operation allows for higher baud rates in asynchronous mode, even with lower peripheral clock frequencies. This mode is enabled by setting the Sample Rate (SAMPR) bit in the Control C (USARTn.CTRLC) register to ‘1’.

When enabled, the baud rate for a given asynchronous baud rate setting will be doubled, as shown in the equations in The Fractional Baud Rate Generator. In this mode, the receiver uses half the number of samples (reduced from 16 to 8) for data sampling and clock recovery. This requires a more accurate baud rate setting and peripheral clock. For more information, see Error Tolerance.