29.2.2.1 CCL Input Selection MUX

The following peripherals outputs are available as inputs into the CCL LUT.


Value	Input source	INSEL0[3:0]	INSEL1[3:0]	INSEL2[3:0]
`0x00`	MASK	None
`0x01`	FEEDBACK	LUTn
`0x02`	LINK	LUT[n+1]
`0x03`	EVENTA	EVENTA
`0x04`	EVENTB	EVENTB
`0x05`	IO	IN0	IN1	IN2
`0x06`	AC	AC0 OUT
`0x07`	USART⁽¹⁾	USART0 TXD
`0x08`	SPI⁽²⁾	SPI0 MOSI	SPI0 MOSI	SPI0 SCK
`0x09`	TCE	WO0	WO1	WO2
`0x0A`	TCBA	TCB0 WO
`0x0B`	TCBB	TCB1 WO

Note:

USART connections to the CCL work only in Asynchronous/Synchronous USART Host mode.
SPI connections to the CCL work only in Host SPI mode.

DS40002684A

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