7.4.9 Interrupts

Table 7-2. Available Interrupts Vectors and Sources
Name	Vector Description	Interrupt Flag	Conditions
CPU	CPU Interrupt	SPLIM	Stack Pointer Limit Error
		BUSERR	Bus Error
		OPC	Illegal Opcode Error

The Interrupt Flags (INTFLAGS) register of the CPU is connected to the CPU Interrupt Controller (CPUINT) as Non-Maskable Interrupts (NMIs). The CPU does not have a corresponding Interrupt Control register since NMIs can, by design, not be masked or disabled. For more information about NMIs, see the CPUINT - CPU Interrupt Controller section.

An interrupt request is generated when the corresponding interrupt flag is set. The interrupt request remains active until the interrupt flag is cleared. See the INTFLAGS register for details on how to clear interrupt flags.