7 Application Information

Figure 7-1. ASK 433.92 MHz and 315 MHz (MSOP)
Note: Values in parenthesis are for 315 MHz.

The MICRF112 is ideal for driving a 50Ω source monopole or a loop antenna. The above figure is an example of a loop antenna configuration. It also illustrates both 315 MHz and 433.92 MHz ASK configurations for a loop antenna. In addition to using a different crystal, modified values are needed for certain frequencies. These are listed in the following table.

Table 7-1. Modified Frequency Values
Frequency (MHz)L1 (nH)C5 (pF)L4 (nH)C7 (pF)Y1 (MHz)
315.0470101504.79.84375
433.9247010823.913.5600

The reference design illustrated in Figure 7-1 has an antenna optimized for using the matching network, as described in the above table

Power Control Using an External Resistor

R7 is used to adjust the RF output levels that may be needed to meet compliance. As an example, Table 7-2 and Table 7-3 list typical values of conducted RF output levels and corresponding R7 resistor values for the 50Ω test board shown in the Test Circuit.

Table 7-2. ASK Output Power at 1 Kbps (Manchester) vs. External Resistor at 315 MHz
R7, ΩOutput Power, dBmIDD, mA
0106.7
758.56.3
1008.06.2
5001.64.13
1000-3.84.87
Table 7-3.  ASK Output Power at 1 Kbps (Manchester) vs. External Resistor at 433.92 MHz
R7, ΩOutput Power, dBmIDD,mA
08.687.5
758.347.33
1008.027.3
5004.346.3
10000.425.5

Output Matching Network

Part of the function of the output network is to attenuate the second and third harmonics. When matching to a transmit frequency, be sure not only to optimize for maximum output power but to attenuate unwanted harmonics.

Layout Issues

PCB layout is extremely important to achieve optimum performance and consistent manufacturing results. Be careful with the orientation of the components to ensure that they do not couple or decouple the RF signal. PCB trace length must be short, to minimize parasitic inductance (1in ~ 20nH). For example, depending on inductance values, a 0.5 in trace can change the inductance by as much as 10%. To reduce parasitic inductance, the use of wide traces and a ground plane under signal traces is recommended. Use vias with low-value inductance for components requiring a connection to ground.

Antenna Layout

The antenna trace layout affects directivity. No ground plane must be under the antenna trace. For consistent performance, do not place components inside the loop of the antenna.