10 Functional Description of the TX112-1 Evaluation Board
The layout of the TX112-1 Evaluation Board PCB is illustrated in Figure 9-1. It is a detailed schematic of the TX112-1. Components labeled “NP” use different configurations for FSK operation. Table 7-2 describes each header pin connector used in the evaluation board.
| Pin | Function Name | Functional Description |
|---|---|---|
| J1-1 | VDD | 1.8V to 3.6V |
| J1-2 | Ground | VSS |
| J1-3 | ASK INPUT | Modulating Data Input, ASK or FSK |
| J2-1 | REF-OSC | External Reference Input |
| J2-2 | GROUND | VSS |
| J2-3 | ENABLE | Enable Input, Active High |