15.2.2 External Reset

An External Reset is generated by a low level on the RESET pin. Reset pulses longer than the minimum pulse width (see table in System and Reset Characteristics) will generate a reset, even if the clock is not running. Shorter pulses are not guaranteed to generate a reset. When the applied signal reaches the Reset Threshold Voltage – V_RST on its positive edge, the delay counter starts the MCU after the time-out period t_TOUT has expired.

Figure 15-4. External Reset During Operation

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