11.1.4 Recommended Operating Conditions
Power Input | Parameter | Conditions | Min | Max | Unit |
---|---|---|---|---|---|
VDDCPU(1) | Cortex-A7 and cache memories | fCPU_CLK ≤ 600 MHz | 1.03 | 1.21 | V |
fCPU_CLK ≤ 800 MHz | 1.12 | 1.21 | V | ||
fCPU_CLK ≤ 1 GHz(2) (SAMA7D65-V/4HB only) | 1.22 | 1.30 | V | ||
VDDCORE | Core logic power supply | – | 1.03 | 1.21 | V |
VDDIODDR | SDRAM I/O lines power supply | [LPDDR2 / LPDDR3]-SDRAM | 1.14 | 1.30 | V |
DDR3-SDRAM | 1.425 | 1.575 | V | ||
DDR3L-SDRAM | 1.283 | 1.45 | V | ||
DDR2-SDRAM | 1.7 | 1.9 | V | ||
VDDIN33(3) |
VDDOUT25 regulator and OTP power supplies Backup area power switch input | – | 3.0 | 3.6 | V |
VDDUTMII(3) | USB device and host UTMI+ interface | – | 3.0 | 3.6 | V |
VDDDPHY(4) | MIPI D-PHY power supply | – | 2.4 | 2.6 | V |
VDDANA(4) | ADC, comparator, temperature sensor, PLLs, main crystal oscillator, main RC oscillator power supply | – | 2.4 | 2.6 | V |
VDDIN25 | PLL LVDS power supply | – | 2.4 | 2.6 | V |
VDDLVDS(5, 6) | LVDS PHY and VDDLVDS I/O lines power supply | – | 1.7 | 3.6 | V |
VDDIOP[0,1](5) | Peripheral I/O lines | – | 1.7 | 3.6 | V |
VDDGMAC[0,1] | MAC Interface I/O lines | – | 1.7 | 3.6 | V |
VDDQSPI[0,1](5) | QSPIx I/O lines | – | 1.7 | 3.6 | V |
VDDSDMMC[0,1,2](5) | SDMMCx I/O lines | – | 1.7 | 3.6 | V |
VBAT | Backup area power switch input | – | 1.7 | 3.6 | V |
tR_VDD | Power supply slope at power-up | Applies to any of the power supply inputs listed above | 0.2 | 20 | mV/μs |
tF_VDD | Power supply slope at power-down | -20 | -1(7) | mV/μs |
- For lifetime estimation as a function of operating voltage and junction temperature, contact a Microchip Sales Representative for further details.
- VDDCPU related alarms in SECUMOD_SR are always triggered when fCPU_CLK > 800 MHz
- VDDIN33 and VDDUTMII are powered from one single power source so that ΔV(VDDIN33,VDDUTMII) ≤ 50 mV.
- VDDANA, VDDIN25 and VDDDPHY must be connected to VDDOUT25.
- Supply range restrictions apply when using the digital peripheral timing characteristics. See I/O Characteristics.
- When the LVDS PHY is used, VDDLVDS must be connected to VDDOUT25.
- For VBAT, this value is 0 mV/μs.
- Refer to Microchip Recommended Power Management Solutions for a power supply schematic example with typical voltage regulator output values.
Symbol | Parameter | Conditions | Min | Max | Unit |
---|---|---|---|---|---|
VIN | Input line voltage range on inputs(2)(3) | – | -0.3 | VDD + 0.3 | V |
IIN | DC current injection on inputs(4)(5) | – | – | ± 0.2 | mA |
ITOT_INJ | Total current injection per power rail or per ground rail(6) | – | – | ± 2 | mA |
- In this table, VDD refers to the voltage of the associated power rail of the I/O line, as defined in the table Pin Description. Ex: for PA12, VDD refers to VDDSDMMC0.
- Input voltages VIN ≤ 0V or VIN ≥ VDD lead to negative or positive current injection on inputs.
- For A/D converter analog inputs (PB28, PB29, PC3, PC4, PC5, PC6, PC7, PC10, PC11, PC12, PC13, PC14, PC15, PC16, PC22), input voltages VIN ≥ min(VDDANA, VADVREFP) lead to saturated A/D conversion to 0xFFF.
- Current injection on A/D converter analog inputs (PB28, PB29, PC3, PC4, PC5, PC6, PC7, PC10, PC11, PC12, PC13, PC14, PC15, PC16, PC22) may degrade the analog performance of the corresponding channel, or the analog performance of other analog channels.
- High frequency current injection must be limited to avoid propagating high frequency signals to internal sensitive analog circuits (oscillators, regulators, etc.). One common use case of high frequency current injection occurs when a digital input pin suffers overshoots and/or undershoots from a poorly adapted transmission line (PCB trace with signal reflections, for example). These cases should be cured by appropriate source series resistor termination. Special attention must be paid to high-speed interfaces (Gigabit Ethernet MAC I/F, SD Card or e.MMC I/F, QSPI I/F, etc.).
- Corresponds to the sum of the positive currents into one power rail and, respectively, to the sum of the negative currents into one ground rail, as defined in the table Pin Description.
Symbol | Parameter | Conditions | Min | Max | Unit |
---|---|---|---|---|---|
fCPU_CLK | Processor clock (CPU_CLK) frequency | VDDCPU ≥ 1.22V (SAMA7D65-V/4HB only) | – | 1000 | MHz |
VDDCPU ≥ 1.12V | – | 800 | MHz | ||
VDDCPU ≥ 1.03V | – | 600 | MHz | ||
fMCK0 | Main system bus clock (MCK0) frequency | – | – | 200 | MHz |
fMCK1 | Main system bus clock (MCK1) frequency | – | – | 200 | MHz |
fMCK2 | Main system bus clock (MCK2) frequency | – | – | 133 | MHz |
fMCK3 | Main system bus clock (MCK3) frequency | – | – | 266 | MHz |
fMCK4 | Main system bus clock (MCK4) frequency | – | – | 400 | MHz |
fMCK5 | Main system bus clock (MCK5) frequency | – | – | 200 | MHz |
fMCK6 | Main system bus clock (MCK6) frequency | – | – | 200 | MHz |
fMCK7 | Main system bus clock (MCK7) frequency | – | – | 100 | MHz |
fMCK8 | Main system bus clock (MCK8) frequency | – | – | 100 | MHz |
fMCK9 | Main system bus clock (MCK9) frequency | – | – | 100 | MHz |
Symbol | Parameter | Conditions | Min | Max | Unit |
---|---|---|---|---|---|
fDDR_CLK | SDRAM clock frequency | [LPDDR2 / LPDDR3]-SDRAM | 100 | 533 | MHz |
[DDR3 / DDR3L]-SDRAM | 100 | 533 | MHz | ||
DDR2-SDRAM | 125 | 533 | MHz |
Symbol | Parameter | Conditions | Min | Max | Unit | |
---|---|---|---|---|---|---|
TJ | Junction temperature range | Ordering Code SAMA7D65-V/4HB | -40 | 105 | °C |
- For lifetime estimation as a function of operating voltage and junction temperature, refer to the application note "SAMA7 Product Lifetime Estimation" (AN4532) on www.microchip.com.
Symbol | Parameter | Typ | Unit | |
---|---|---|---|---|
RJA | Junction-to-ambient thermal resistance | 25 | °C/W | |
RJB | Junction-to-board thermal resistance | 18 | °C/W | |
RJC | Junction-to-case thermal resistance | 8 | °C/W | |
ΨJT | Junction-to-package-top characterization parameter | 0.3 | °C/W |
- According to the JEDEC JESD51-2 standard, with 2s2p board and 0 m/s air flow.
-
The package characteristics in the above table are provided according to the JEDEC JESD51-2 standard with the 2s2p board and 0 m/s air flow. These values are not directly applicable to the final application. As per JEDEC standards, these parameters represent the device mounted on a specific PCB under controlled conditions. In real-world applications, the PCB design and construction, airflow, and other factors may significantly impact thermal characteristics.