3.6 Sector Size and Number of Sectors per Page
The NAND Flash sector size is programmable and can be set to 512 bytes or 1024 bytes. The number of sectors per page can be 1, 2, 4 or 8 sectors, depending on the page size of the NAND Flash device. The ECC computation is based on the number of sectors per page.
Table 3-1 provides an overview of the configurations supported on different page sizes, highlighting what is permitted (X) or not (–).
| Sector Size | 512 Bytes | 1024 Bytes | ||||||
|---|---|---|---|---|---|---|---|---|
| Sectors/Page | 1 | 2 | 4 | 8 | 1 | 2 | 4 | 8 |
| Page Size 512 | X | – | – | – | – | – | – | – |
| Page Size 1024 | – | X | – | – | X | – | – | – |
| Page Size 2048 | – | – | X | – | – | X | – | – |
| Page Size 4096 | – | – | – | X | – | – | X | – |
| Page Size 8192 | – | – | – | – | – | – | – | X |
The PMECC embedded in the SAM9X60 and SAM9X7 Series devices supports 2, 4, 8, 12 and 24 bits of errors per sector. The redundancy is generated at encoding time.
Table 3-2 shows the number of relevant ECC bytes per sector with different correction capabilities. Refer to this table when evaluating the number of bits to correct and the number of bytes used in the spare area.
| Sector Size | 512 Bytes | 1024 Bytes | ||||||||
|---|---|---|---|---|---|---|---|---|---|---|
| Correcting Capabilities | 2 | 4 | 8 | 12 | 24 | 2 | 4 | 8 | 12 | 24 |
| Number of ECC Bytes | 4 | 7 | 13 | 20 | 39 | 4 | 7 | 14 | 21 | 42 |
When a NAND Flash write page operation is performed, the N-byte redundancy should be appended to the page and written in the spare area.
N = Number of ECC bytes x Sectors per page
For example, if the NAND Flash page size is 2048 bytes, configure a 512-byte sector size and correct 4-bit errors. The number of ECC bytes is 7 (see Table 3-2).
N = 7 x 4 = 28
Table 3-3 provides an example of the supported correction capability configuration on different page sizes (512/1024/2048/4096/8192 bytes). However, some cases are not supported, such as 12-bit error correction on a 2048-page size NAND Flash. The size of the ECC redundancy is 80 bytes, and there is not enough space in the spare area (total 64 bytes) to be written. In such a case, the table cell shows “–”.
| Sector Size | 512 Bytes | 1024 Bytes | ||||||||
|---|---|---|---|---|---|---|---|---|---|---|
| Correcting Capabilities | 2 | 4 | 8 | 12 | 24 | 2 | 4 | 8 | 12 | 24 |
| Page Size 512 + 16 | 4 | 7 | 13 | – | – | – | – | – | – | – |
| Page Size 1024 + 32 | 8 | 14 | 26 | – | – | 4 | 7 | 14 | 21 | – |
| Page Size 2048 + 64 | 16 | 28 | 52 | – | – | 8 | 14 | 28 | 42 | – |
| Page Size 4096 + 224 | 32 | 56 | 104 | 160 | – | 16 | 28 | 56 | 84 | 168 |
| Page Size 8192 + 256 | – | – | – | – | – | 32 | 56 | 112 | 168 | – |
The programmable ECC area (between Start address and End address) contains the redundancy value generated by the internal PMECC peripheral. It is appended to the page and written in the ECC area by the processor.
The Start address indicates the first byte address of the ECC area and is configured using the eccOffset field from the NAND Flash header, as described in NAND Flash Specific Header. The End address indicates the last byte address of the ECC area.
End address = Start address + Total number of ECC bytes
For example, if a NAND Flash page size is 2048 bytes and the sector size is 512 bytes, correct 4-bit errors. The number of ECC bytes is 7 and the total number of ECC bytes is 28 bytes. If the Start address of the ECC area is set as 2, the End address of the ECC area is 2 + 28 = 30.