22.8 Register Summary


Offset	Name	Bit Pos.	7	6	5	4	3	2	1	0
0x00	CTRLA	7:0								SWRST
0x01 ... 0x03	Reserved
0x04	SYNCBUSY	7:0	GENCTRL[5:0]							SWRST
		15:8			GENCTRL[11:6]
		23:16
		31:24
0x08 ... 0x1F	Reserved
0x20	GENCTRL0	7:0				SRC[4:0]
		15:8			RUNSTDBY	DIVSEL	OE	OOV	IDC	GENEN
		23:16	DIV[7:0]
		31:24	DIV[15:8]
...
0x5C	GENCTRL15	7:0				SRC[4:0]
		15:8			RUNSTDBY	DIVSEL	OE	OOV	IDC	GENEN
		23:16	DIV[7:0]
		31:24	DIV[15:8]
0x60 ... 0x7F	Reserved
0x80	PCHCTRL0	7:0	WRTLOCK	CHEN			GEN[3:0]
		15:8
		23:16
		31:24
...
0x0118	PCHCTRL38	7:0	WRTLOCK	CHEN			GEN[3:0]
		15:8
		23:16
		31:24

DS60001921A

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