1.13 CPU STATUS Register

Note:
  1. This bit may be read or cleared (not set). Clearing this bit will clear SA and SB irrespective of the value simultaneously written to SA and/or SB.
  2. IPL[2:0] become read only bits if NSTDIS(INTCON1[15])=1 (nesting disabled). .

Legend: C = Clearable bit

Name: SR

Bit 3130292827262524 
          
Access  
Reset  
Bit 2322212019181716 
 VF    CTX[2:0] 
Access RRRR 
Reset 0000 
Bit 15141312111098 
 OAOBSASBOABSAB IPL3 
Access R/WR/WR/WR/WRR/CR/C 
Reset 0000000 
Bit 76543210 
 IPL[2:0]RANOVZC 
Access R/WR/WR/WRR/WR/WR/WR/W 
Reset 00000000 

Bit 23 – VF Vector (Fetch) Fail Status

ValueDescription
1 Indicates to the bus error handler that the source of the bus error is a vector fetch. The vector data read will be substituted with the contents of the Vector Fail Address (VFA) SFR.
0 Indicates to the bus error handler that the source of the bus error is not a vector fetch.

Bits 18:16 – CTX[2:0] Current (W register) Context Identifier

Identifies which W register context is currently in use by the CPU
ValueDescription
111 Context 7 is currently in use
110 Context 6 is currently in use
101 Context 5 is currently in use
100 Context 4 is currently in use
011 Context 3 is currently in use
010 Context 2 is currently in use
001 Context 1 is currently in use
000 Context 0 is currently in use

Bit 15 – OA Accumulator A Fractional Overflow Status

ValueDescription
1 Accumulator A fractional overflow has occurred (its contents can no longer be represented as a 1.31 fractional value)
0 Accumulator A not overflowed

Bit 14 – OB Accumulator B Fractional Overflow Status

ValueDescription
1 Accumulator A fractional overflow has occurred (its contents can no longer be represented as a 1.31 fractional value)
0 Accumulator A not overflowed

Bit 13 – SA Accumulator A Saturation/Sign Overflow ‘Sticky’ Status

ValueDescription
1 Accumulator A is saturated or has been saturated at some time, or has overflowed into bit 71 (if saturation is disabled)
0 Accumulator A is not saturated or has not overflowed into bit 71 (if saturation is disabled)

Bit 12 – SB Accumulator B Saturation/Sign Overflow ‘Sticky’ Status

ValueDescription
1 Accumulator B is saturated or has been saturated at some time, or has overflowed into bit 71 (if saturation is disabled)
0 Accumulator B is not saturated or has not overflowed into bit 71 (if saturation is disabled)

Bit 11 – OAB OA || OB Combined Accumulator Fractional Overflow Status

ValueDescription
1 Accumulators A or B fractional overflow has occurred (one or both of their contents can no longer be represented as a 1.31 fractional value)
0 Neither Accumulators A nor B have overflowed

Bit 10 – SAB  SA || SB Combined Accumulator ‘Sticky’ Status(1)

ValueDescription
1 Accumulators A or B are saturated or have been saturated at some time, or have overflowed into bit 71 (if saturation is disabled)
0 Neither Accumulator A nor B are saturated or have overflowed into bit 71 (if saturation is disabled)

Bit 8 – IPL3 MSb (Most Significant bit) of CPU Priority Level Nibble

ValueDescription
1 CPU Priority ≥ 8 (trap exception underway)
0 CPU Priority < 8 (no trap exception underway)

Bits 7:5 – IPL[2:0]  CPU Interrupt Priority Level Status(2)

ValueDescription
111 All interrupts disabled
110 Level 7 interrupts enabled
101 Level 6 and 7 interrupts enabled
100 Level 5 through 7 interrupts enabled
011 Level 4 through 7 interrupts enabled
010 Level 3 through 7 interrupts enabled
001 Level 2 through 7 interrupts enabled
000 Level 1 through 7 interrupts enabled

Bit 4 – RA  REPEAT Loop Active

ValueDescription
1 REPEAT loop in progress
0 REPEAT loop not in progress

Bit 3 – N MCU ALU Negative

ValueDescription
1 Result was negative
0 Result was non-negative (zero or positive)

Bit 2 – OV MCU ALU Overflow

This bit is used for signed arithmetic (2’s complement). It indicates an overflow of the magnitude that causes the Sign bit to change state.
ValueDescription
1 Overflow occurred for signed arithmetic (in this arithmetic operation)
0 No overflow occurred

Bit 1 – Z MCU ALU ‘Sticky’ Zero

ValueDescription
1 An operation which effects the Z bit has set it at some time in the past
0 The most recent operation which effects the Z bit has cleared it (i.e., a non-zero result)

Bit 0 – C  MCU ALU Carry/Borrow

ValueDescription
1 A carry-out from the MSb of the result occurred
0 No carry-out from the MSb of the result occurred