4.7 AC Programming Characteristics
Parameter | Symbol | Limits | Units | Test conditions | |
---|---|---|---|---|---|
Minimum | Maximum | ||||
Address Setup Time | tAS | 2 | — | μs |
Input rise and fall times (10% to 90%) 20 ns Input pulse levels 0.45V to 2.4V Input timing reference level 0.8V to 2.0V Output timing reference level 0.8V to 2.0V |
OE/VPP Setup Time | tOES | 2 | — | μs | |
OE/VPP Hold Time | tOEH | 2 | — | μs | |
Data Setup Time | tDS | 2 | — | μs | |
Address Hold Time | tAH | 0 | — | μs | |
Data Hold Time | tDH | 2 | — | μs | |
CE High to Output Float Delay(3) | tDFP | 0 | 130 | ns | |
VCC Setup Time | tVCS | 2 | — | μs | |
CE Program Pulse Width(4) | tPW | 95 | 105 | μs | |
Data Valid From CE(3) | tDV | — | 1 | μs | |
OE/VPPRecovery Time | tVR | 2 | — | μs | |
OE/VPP Pulse Rise Time During Programming | tPRT | 50 | — | ns |
Note:
- TA = +25 ± 5°C, VCC= 6.5 ± 0.25V, OE/VPP = 13.0 ± 0.25V.
- VCC must be applied simultaneously with or before OE/VPP and removed simultaneously with or after OE/VPP.
- This parameter is only sampled, and is not 100% tested. Output float is defined as the point where data is no longer driven. See timing diagram.
- Program pulse width tolerance is 100 μs ± 5%.