20.14.4 TMRxGATE

Timer Gate Source Selection Register

Name:	TMRxGATE
Offset:	0xFD1,0xFCB,0xFC5,0xF32


Bit	7	6	5	4	3	2	1	0
				GSS[4:0]
Access				R/W	R/W	R/W	R/W	R/W
Reset				0	0	0	0	0

Bits 4:0 – GSS[4:0] Timer Gate Source Selection bits

Table 20-4. Timer Gate Signal Selection
GSS	Gate Source
GSS	Timer1	Timer3	Timer5	Timer7
`11111-10111`	Reserved	Reserved	Reserved	Reserved
`10110`	ZCDOUT	ZCDOUT	ZCDOUT	ZCDOUT
`10101`	CMP3OUT	CMP3OUT	CMP3OUT	CMP3OUT
`10100`	CMP2OUT	CMP2OUT	CMP2OUT	CMP2OUT
`10011`	CMP1OUT	CMP1OUT	CMP1OUT	CMP1OUT
`10010`	PWM7OUT	PWM7OUT	PWM7OUT	PWM7OUT
`10001`	PWM6OUT	PWM6OUT	PWM6OUT	PWM6OUT
`10000`	CCP5OUT	CCP5OUT	CCP5OUT	CCP5OUT
`01111`	CCP4OUT	CCP4OUT	CCP4OUT	CCP4OUT
`01110`	CCP3OUT	CCP3OUT	CCP3OUT	CCP3OUT
`01101`	CCP2OUT	CCP2OUT	CCP2OUT	CCP2OUT
`01100`	CCP1OUT	CCP1OUT	CCP1OUT	CCP1OUT
`01101`	SMT2 overflow	SMT2 overflow	SMT2 overflow	SMT2 overflow
`01010`	SMT1 overflow	SMT1 overflow	SMT1 overflow	SMT1 overflow
`01001`	TMR8OUT (post-scaled)	TMR8OUT (post-scaled)	TMR8OUT (post-scaled)	TMR8OUT (post-scaled)
`01000`	TMR7 overflow	TMR7 overflow	TMR7 overflow	Reserved
`00111`	TMR6OUT (post-scaled)	TMR6OUT (post-scaled)	TMR6OUT (post-scaled)	TMR6OUT (post-scaled)
`00110`	TMR5 overflow	TMR5 overflow	Reserved	TMR5 overflow
`00101`	TMR4OUT (post-scaled)	TMR4OUT (post-scaled)	TMR4OUT (post-scaled)	TMR4OUT (post-scaled)
`00100`	TMR3 overflow	Reserved	TMR3 overflow	TMR3 overflow
`00011`	TMR2OUT (post-scaled)	TMR2OUT (post-scaled)	TMR2OUT (post-scaled)	TMR2OUT (post-scaled)
`00010`	Reserved	TMR1 overflow	TMR1 overflow	TMR1 overflow
`00001`	TMR0 overflow	TMR0 overflow	TMR0 overflow	TMR0 overflow
`00000`	Pin selected by T1GPPS	Pin selected by T3GPPS	Pin selected by T5GPPS	Pin selected by T7GPPS

Reset States:

POR/BOR = 0000

All Other Resets = uuuu