21.11.6 TxRST

Name:	TxRST
Offset:	0xFC0,0xFBA,0xFB4,0xF2D

Timer External Reset Signal Selection Register


Bit	7	6	5	4	3	2	1	0
					RSEL[3:0]
Access					R/W	R/W	R/W	R/W
Reset					0	0	0	0

Bits 3:0 – RSEL[3:0]

External Reset Source Selection Bits

Table 21-4. External Reset Sources
RSEL[3:0]	Reset Source
RSEL[3:0]	TMR2	TMR4	TMR6	TMR8
`1111`	ZCD_OUT	ZCD_OUT	ZCD_OUT	ZCD_OUT
`1110`	CMP3OUT	CMP3OUT	CMP3OUT	CMP3OUT
`1101`	CMP2OUT	CMP2OUT	CMP2OUT	CMP2OUT
`1100`	CMP1OUT	CMP1OUT	CMP1OUT	CMP1OUT
`1011`	PWM7OUT	PWM7OUT	PWM7OUT	PWM7OUT
`1010`	PWM6OUT	PWM6OUT	PWM6OUT	PWM6OUT
`1001`	CCP5OUT	CCP5OUT	CCP5OUT	CCP5OUT
`1000`	CCP4OUT	CCP4OUT	CCP4OUT	CCP4OUT
`0111`	CCP3OUT	CCP3OUT	CCP3OUT	CCP3OUT
`0110`	CCP2OUT	CCP2OUT	CCP2OUT	CCP2OUT
`0101`	CCP1OUT	CCP1OUT	CCP1OUT	CCP1OUT
`0100`	TMR8 post-scaled	TMR8 post-scaled	TMR8 post-scaled	Reserved
`0011`	TMR6 post-scaled	TMR6 post-scaled	Reserved	TMR6 post-scaled
`0010`	TMR4 post-scaled	Reserved	TMR4 post-scaled	TMR4 post-scaled
`0001`	Reserved	TMR2 post-scaled	TMR2 post-scaled	TMR2 post-scaled
`0000`	Pin selected by T2INPPS	Pin selected by T4INPPS	Pin selected by T6INPPS	Pin selected by T8INPPS

Value	Description
n	See the External Reset Sources table

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