4.12.8 UTMI0 Configuration Register
| Name: | SFR_UTMI0Rx |
| Offset: | 0x2040 + x*0x04 [x=0..2] |
| Reset: | 0x029AD818 (SFR_UTMI0R0) or 0x009AD818 (SFR_UTMI0R1/R2) |
| Property: | Read/Write |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| VBUS | TXPREEMPAMPTUNE[1] | ||||||||
| Access | R/W | R/W | |||||||
| Reset |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| TXPREEMPAMPTUNE[0] | |||||||||
| Access | R/W | ||||||||
| Reset |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| Access | |||||||||
| Reset |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| COMMONONN | |||||||||
| Access | R/W | ||||||||
| Reset |
Bit 25 – VBUS VBUS Valid Indicator
| Value | Description |
|---|---|
| 0 | The VBUS signal is not valid, and the pull-up resistor on D+ is disabled. |
| 1 | The VBUS signal is valid, and the pull-up resistor on D+ is enabled. |
Bits 24:23 – TXPREEMPAMPTUNE[1:0] HS Transmitter Pre-Emphasis Current Control
Controls the amount of current sourced to HSS#_DP and HSS#_DM after a J-to-K or K-to-J transition. The HS Transmitter preemphasis current is defined in terms of unit amounts. One unit amount is approximately 600 µA and is defined as 1X pre-emphasis current.
| Value | Name |
|---|---|
| 00 | HS Transmitter pre-emphasis is disabled (default). |
| 01 | HS Transmitter pre-emphasis circuit sources 1x pre-emphasis current (recommended). |
| 10 | HS Transmitter pre-emphasis circuit sources 2x pre-emphasis current. |
| 11 | HS Transmitter pre-emphasis circuit sources 3x pre-emphasis current. |
Bit 3 – COMMONONN Common Block Power-Down Control
| Value | Description |
|---|---|
| 0 | PLL blocks remain powered. |
| 1 | PLL blocks are powered down. |