5.4 Digital I/O Pin Behavior During Power-up Sequences

The following table represents the digital I/O pin states corresponding to the device power modes.

Table 5-3. Digital I/O Pin Behavior in Different Device States
Device StateVDDIOCHIP_ENRESETNOutput DriverInput DriverPull-up/Down

Resistor (96 kΩ)

Power_Down: Core Supply OffHighLowLowDisabled

(High-Z)

DisabledDisabled
Power-on Reset: Core Supply and HardReset OnHighHighLowDisabled

(High-Z)

DisabledEnabled
Power-on Default: Core Supply On, Device Out of Reset and Not ProgrammedHighHighHighDisabled

(High-Z)

EnabledEnabled

On_Doze/On_Transmit/ On_Receive: Core Supply On, Device Programmed by Firmware

HighHighHighProgrammed by Firmware for Each Pin: Enabled or DisabledOpposite of Output Driver StateProgrammed by Firmware for Each Pin: Enabled or Disabled