4.6.1.2 Design Layout Recommendations

When designing the SD Card interface, consider the following recommendations:

  • Match signal lengths to within 50 mils. Affected PIOs in the example above are PA0 to PA5.
  • Place the clock line (PA0) at least 3 times the trace width away from other signals for noise immunity.
  • Apply impedance control of 50 Ohms on the clock and data interfaces.
  • Place data signals at least 2 times the trace width away from any other data traces.
  • Place data signals at least 1 trace width away from any copper plan.
Figure 4-20. SD Card Layout Example