5.4 Digital I/O Pin Behavior During Power-Up Sequences
The following table represents the digital I/O pin states corresponding to the device power modes.
| Device State | VDDIO | CHIP_EN | RESETN | Output Driver | Input Driver | Pull Up/Down Resistor (96 kOhm) |
|---|---|---|---|---|---|---|
| Power_Down: core supply OFF | High | Low | Low | Disabled (Hi-Z) | Disabled | Disabled |
| Power-On Reset: core supply and hard reset ON | High | High | Low | Disabled (Hi-Z) | Disabled | Enabled |
| Power-On Default: core supply ON, device out of reset and not programmed | High | High | High | Disabled (Hi-Z) | Enabled | Enabled |
|
On_Doze/ On_Transmit/ On_Receive: core supply ON, device programmed by firmware | High | High | High | Programmed by firmware for each pin: enabled or disabled | Opposite of Output Driver state | Programmed by firmware for each pin: enabled or disabled |