34.4.12 APMCLK
| Name: | APMCLK |
| Offset: | 0x1F68 |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| CLK[1:0] | |||||||||
| Access | R/W | R/W | |||||||
| Reset | 0 | 0 | |||||||
Bits 1:0 – CLK[1:0] Analog Peripheral Manager Clock Selection
| Value | Description |
|---|---|
11 | ADCRC |
10 | SOSC |
01 | LFINTOSC |
00 | Pin selected by APMCLKPPS |
| Name: | APMCLK |
| Offset: | 0x1F68 |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| CLK[1:0] | |||||||||
| Access | R/W | R/W | |||||||
| Reset | 0 | 0 | |||||||
| Value | Description |
|---|---|
11 | ADCRC |
10 | SOSC |
01 | LFINTOSC |
00 | Pin selected by APMCLKPPS |
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