34.4.2 APMPRE

Analog Peripheral Manager Host Timer Clock Prescaler Register

Note:

The individual bytes in this multibyte register can be accessed with the following register names:
- APMPREH: Accesses APMPRE[15:8]
- APMPREL: Accesses APMPRE[7:0]

Name:	APMPRE
Offset:	0x1F4D


Bit	15	14	13	12	11	10	9	8
	PRE[15:8]
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0


Bit	7	6	5	4	3	2	1	0
	PRE[7:0]
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0

Bits 15:0 – PRE[15:0] Analog Peripheral Manager Host Timer Clock Prescaler

Reset States:

POR/BOR = 0000000000000000

All Other Resets = uuuuuuuuuuuuuuuu

Value	Description
0xFFFF to 0x0001	Divider ratio is (PS+1):1
0x0000	The input clock is not divided (1:1 clocking)

The individual bytes in this multibyte register can be accessed with the following register names: APMPREH: Accesses APMPRE[15:8] APMPREL: Accesses APMPRE[7:0]