36.16 ADC

Operating conditions:
  • VDD = 1.8V to 5.5V
  • Temperature = -40°C to 125°C
  • DUTYCYC = 25%
  • CLKADC = 13 × fADC
  • SAMPCAP is 10 pF for 0.55V reference, while it is set to 5 pF for VREF ≥ 1.1V
  • Applies for all allowed combinations of VREF selections and Sample Rates unless otherwise stated
Table 36-25. Power Supply, Reference, and Input Range
Symbol Description Conditions Min. Typ. Max. Unit
VDD Supply voltage 1.8 - 5.5 V
VREF Reference voltage REFSEL = Internal reference 0.55 - VDD - 0.4 V
REFSEL = VDD 1.8 - 5.5
CIN Input capacitance SAMPCAP = 5 pF - 5 - pF
SAMPCAP = 10 pF - 10 -
RIN Input resistance - 14 - kΩ
VIN Input voltage range 0 - VREF V
IBAND Input bandwidth 1.1V ≤ VREF - - 57.5 kHz
Table 36-26. Clock and Timing Characteristics
Symbol Description Conditions Min. Typ. Max. Unit
fADC Sample rate 1.1V ≤ VREF 15 - 115 ksps
1.1V ≤ VREF (8-bit resolution) 15 - 150
VREF = 0.55V (10 bits) 7.5 - 20
CLKADC Clock frequency VREF = 0.55V (10 bits) 100 - 260 kHz
1.1V ≤ VREF (10 bits) 200 - 1500
1.1V ≤ VREF (8-bit resolution) 200 - 2000(1)
Ts Sampling time 2 2 33 CLKADC cycles
TCONV Conversion time (latency) Sampling time = 2 CLKADC 8.7 - 50 µs
TSTART Start-up time Internal VREF - 22 - µs
Note:
  1. 50% duty cycle is required for clock frequencies above 1500 kHz.
Table 36-27. Accuracy Characteristics(2)
Symbol Description Conditions Min. Typ. Max. Unit
RES Resolution - 10 - bit
INL Integral nonlinearity REFSEL = INTERNAL

VREF = 0.55V		 fADC = 7.7 ksps - 1.0 - LSb
REFSEL = INTERNAL or VDD fADC = 15 ksps - 1.0 -
REFSEL = INTERNAL or VDD

1.1V ≤ VREF		 fADC = 77 ksps - 1.0 -
fADC = 115 ksps - 1.2 -
DNL(1) Differential nonlinearity REFSEL = INTERNAL

VREF = 0.55V		 fADC = 7.7 ksps - 0.6 - LSb
REFSEL = INTERNAL or VDD fADC = 15 ksps - 0.4 -
REFSEL = INTERNAL or VDD

1.1V ≤ VREF		 fADC = 77 ksps - 0.4 -
REFSEL = INTERNAL

1.1V ≤ VREF		 fADC = 115 ksps - 0.6 -
REFSEL = VDD

1.1V ≤ VREF		 fADC = 115 ksps - 0.6 -
EABS Absolute accuracy REFSEL = INTERNAL

VREF = 1.1V		 T = [0, 105]°C

VDD = [1.8V, 3.6V]		 - 3 - LSb
VDD = [1.8V, 3.6V] - 3 -
REFSEL = VDD - 2 -
REFSEL = INTERNAL - 3 -
EGAIN Gain error REFSEL = INTERNAL

VREF = 1.1V		 T = [0, 105]°C

VDD = [1.8V, 3.6V]		 - 5 - LSb
VDD = [1.8V, 3.6V] - 5 -
REFSEL = VDD - 2 -
REFSEL = INTERNAL - 5 -
EOFF Offset error - -0.5 - LSb
Note:
  1. A DNL error of ≤ 1 LSb ensures a monotonic transfer function with no missing codes.
  2. These values are based on characterization and not covered by production test limits.