3.1 DALI Physical Layer Interface
The DALI physical layer interface bridges the voltage level between the DALI BUS and the ATxmega32E5. According to the DALI protocol, the HIGH Level ranges between 9.5V and 22.5V, and the LOW Level between -6.5V and 6.5V. The DALI BUS logic level is converted to MCU logic level. The interface logic for the MCU ATxmega32E5 used in this kit should be between 0 and 3.3V. Figure 3-2 shows the diagram of the DALI physical layer interface.
Two optocouplers are used to isolate the voltage level between the DALI bus and the microcontroller.
- It is suitable for the whole working temperature range
- It can be used to trim the input waveform of the signal for the MCU
- High tolerance for the different components used in mass production
The peripheral modules on ATxmega32E5 reduce the firmware overhead.
The USART module is connected to the XMEGA® Custom Logic (XCL) module and serial frame length can be extended up to 256 bits. The combination of ATxmega32E5 LUT and USART can implement encoding and decoding. The combination can receive and transfer data with Manchester code directly, without additional firmware.
For Manchester encoding, the USART needs to operate in Synchronous mode. The SCK pin of the USART is used as the Manchester clock signal. Transmit data from the shift register is used as Manchester data. To encode the data, the USART SCK and data signals are XOR'd together. The logic output from XCL is connected to the USART TXD pin.
The connection from the DALI physical layer interface to the MCU is shown in the table below.
Pin on AVR® ATxmega32E5 | DALI Physical Layer Interface |
---|---|
PD2 | DALI_INPUT |
PD3 | DALI_OUTPUT |