15.2 Features
Flash Controller
- PB-Bridge-D Interface that Provides Access to the Flash Controller Registers
- AHB Initiator for Bus Hosted Reads the Row Programming Data from SRAM
- Write Protect for Program Flash (PFM)
- Single page protection resolution
- Protect < Address
- Protect ≥ Address
- Individual Page Write Protection for Boot Flash (BFM)
- Error Correction Code Support
- Supports Chip and Page Erase
- Supports Single Word, Quad Word and Row Program Options
- Supports Fash Erase/Retry to Increase Retention and Endurance
Flash Memory
- 128-Bit Wide Flash Memory Access
- 4 Kbytes Page Size
- Row Size is 1 KB (256 IW)
- Flash-Based One-Time-Programmable (OTP) Page
The Flash controller allows the Flash memory to be accessed through the following methods:
- Run-Time Self-Programming (RTSP)
- Serial Wire Debug (SWD) programming using DSU (See Device Service Unit (DSU) from Related Links and PIC32CX-BZ3 Programming Specification.)