6.5.5.2.2 Output Mapping in PIC32CX-BZ3 Family of Devices
The following tables provide output mapping in PIC32CX-BZ3 family of devices.
Group 1 | Group 2 | Group 3 | Group 4 |
---|---|---|---|
OFF | OFF | OFF | OFF |
SERCOM0_PAD1 | SERCOM0_PAD0 | OFF | SERCOM0_PAD2 |
SERCOM1_PAD1 | SERCOM0_PAD3 | SERCOM0_PAD0 | OFF |
REFO1 | SERCOM0_PAD2 | SERCOM0_PAD3 | SERCOM0_PAD0 |
REFO2 | OFF | SERCOM1_PAD2 | SERCOM1_PAD3 |
REFO3 | SERCOM1_PAD3 | OFF | OFF |
REFO4 | SERCOM1_PAD2 | SERCOM1_PAD3 | SERCOM1_PAD0 |
QSPI_SCK | TCC0_WO1 | TCC0_WO2 | TCC0_WO3 |
OFF | TCC0_WO5 | TCC0_WO0 | TCC0_WO1 |
OFF | TCC0_WO3 | TCC0_WO4 | TCC0_WO5 |
OFF | TCC1_WO1 | TCC1_WO2 | TCC1_WO3 |
OFF | TCC1_WO5 | TCC1_WO0 | TCC1_WO1 |
OFF | TCC1_WO3 | TCC1_WO4 | TCC1_WO5 |
OFF | TCC2_WO1 | TCC2_WO0 | TCC2_WO1 |
OFF | OFF | OFF | OFF |
OFF | TC0_WO1 | TC0_WO0 | TC0_WO0 |
OFF | TC1_WO1 | TC1_WO0 | TC1_WO1 |
OFF | TC2_WO1 | TC2_WO0 | TC2_WO1 |
OFF | TC3_WO1 | TC3_WO0 | TC3_WO1 |
OFF | TC4_WO1 | TC4_WO0 | TC4_WO1 |
OFF | TC5_WO1 | TC5_WO0 | TC5_WO1 |
OFF | TC6_WO1 | TC6_WO0 | TC6_WO1 |
OFF | TC7_WO1 | TC7_WO0 | TC7_WO1 |
OFF | QSPI_CS | QSPI_CS | QSPI_CS |
OFF | QSPI_DATA0 | QSPI_DATA1 | QSPI_DATA2 |
OFF | QSPI_DATA3 | QSPI_DATA0 | QSPI_DATA1 |
OFF | QSPI_DATA2 | QSPI_DATA3 | QSPI_DATA0 |
OFF | CCL_OUT1 | CCL_OUT0 | CCL_OUT1 |
RPn Port Pin | RPnG1R SFR | RPnG1R Bits | RPnG1R Value to Peripheral Pin Selection |
---|---|---|---|
RPA3 | RPA3G1R | RPA3G1R[4:0] | 00000 = OFF 00001 = SERCOM0_PAD1 00010 = SERCOM1_PAD1 00011 = REFO1 00100 = REFO2 00101 = REFO3 00110 = REFO4 00111 = QSPI_SCK 01000 = OFF 01001 = OFF 01000 = OFF 01001 = OFF 01010 = OFF 01011 = OFF 01100 = OFF 01101 = OFF 01110 = OFF 01111 = OFF 10000 = OFF 10001 = OFF 10010 = OFF 10011 = OFF 10100 = OFF 10101 = OFF 10110 = OFF 10111 = OFF 11000 = OFF 11001 = OFF 11010 = OFF 11011 = OFF 11100 = OFF 11101 = OFF 11110 = OFF 11111 = OFF |
RPA5 | RPA5G1R | RPA5G1R[4:0] | |
RPA6 | RPA6G1R | RPA6G1R[4:0] | |
RPA7 | RPA7G1R | RPA7G1R[4:0] | |
RPB5 | RPB5G1R | RPB5G1R[4:0] | |
RPB6 | RPB6G1R | RPB6G1R[4:0] | |
RPB7 | RPB7G1R | RPB7G1R[4:0] | |
RPB8 | RPB8G1R | RPB8G1R[4:0] | |
RPB9 | RPB9G1R | RPB9G1R[4:0] | |
Note:
|
RPn Port Pin | RPnG2R SFR | RPnG2R Bits | RPnG2R Value to Peripheral Pin Selection |
---|---|---|---|
RPA0(1) | RPA0G2R | RPA0G2R [4:0] | 00000 = OFF 00001 = SERCOM0_PAD0 00010 = SERCOM0_PAD3 00011 = SERCOM0_PAD2 00100 = OFF 00101 = SERCOM1_PAD3 00110 = SERCOM1_PAD2 00111 = TCC0_WO1 01000 = TCC0_WO5 01001 = TCC0_WO3 01010 = TCC1_WO1 01011 = TCC1_WO5 01100 = TCC1_WO3 01101 = TCC2_WO1 01110 = OFF 01111 = TC0_WO1 10000 = TC1_WO1 10001 = TC2_WO1 10010 = TC3_WO1 10011 = TC4_WO1 10100 = TC5_WO1 10101 = TC6_WO1 10110 = TC7_WO1 10111 = QSPI_CS 11000 = QSPI_DATA0 11001 = QSPI_DATA3 11010 = QSPI_DATA2 11011 = CCL_OUT1 11100 = Reserved 11101 = Reserved 11110 = Reserved 11111 = Reserved |
RPA3 | RPA3G2R | RPA3G2R[4.0] | |
RPA4 | RPA4G2R | RPA4G2R[4.0] | |
RPA6 | RPA6G2R | RPA6G2R[4.0] | |
RPA7 | RPA3G2R | RPA7G2R[4.0] | |
RPA8 | RPA8G2R | RPA8G2R[4.0] | |
RPB0(1) | RPB0G2R | RPB0G2R[4.0] | |
RPB1(1) | RPB1G2R | RPB1G2R[4.0] | |
RPB4 | RPB4G2R | RPB4G2R[4.0] | |
RPB5 | RPB5G2R | RPB5G2R[4.0] | |
RPB8 | RPB8G2R | RPB8G2R[4.0] | |
RPB12(1) | RPB12G2R | RPB12G2R[4.0] | |
RPB13(1) | RPB13G2R | RPB13G2R[4.0] | |
Note:
|
RPn Port Pin | RPnG3R SFR | RPnG3R Bits | RPnG3R Value to Peripheral Pin Selection |
---|---|---|---|
RPA0(1) | RPA0G3R | RPA0G3R [4:0] | 00000 = OFF 00001 = OFF 00010 = SERCOM0_PAD0 00011 = SERCOM0_PAD3 00100 = SERCOM1_PAD2 00101 = OFF 00110 = SERCOM1_PAD3 00111 = TCC0_WO2 01000 = TCC0_WO0 01001 = TCC0_WO4 01010 = TCC1_WO2 01011 = TCC1_WO0 01100 = TCC1_WO4 01101 = TCC2_WO0 01110 = OFF 01111 = TC0_WO0 10000 = TC1_WO0 10001 = TC2_WO0 10010 = TC3_WO0 10011 = TC4_WO0 10100 = TC5_WO0 10101 = TC6_WO0 10110 = TC7_WO0 10111 = QSPI_CS 11000 = QSPI_DATA1 11001 = QSPI_DATA0 11010 = QSPI_DATA3 11011 = CCL_OUT0 11100 = Reserved 11101 = Reserved 11110 = Reserved 11111 = Reserved |
RPA1(1) | RPA1G3R | RPA1G3R[4.0] | |
RPA3 | RPA3G3R | RPA3G3R[4.0] | |
RPA4 | RPA4G3R | RPA4G3R[4.0] | |
RPA5 | RPA5G3R | RPA5G3R[4.0] | |
RPA8 | RPA8G3R | RPA8G3R[4.0] | |
RPA9 | RPA9G3R | RPA9G3R[4.0] | |
RPA13(1) | RPA13G3R | RPA13G3R[4.0] | |
RPB1(1) | RPB1G3R | RPB1G3R[4.0] | |
RPB2(1) | RPB2G3R | RPB2G3R[4.0] | |
RPB6 | RPB6G3R | RPB6G3R[4.0] | |
RPB9 | RPB9G3R | RPB9G3R[4.0] | |
RPB10(1) | RPB10G3R | RPB10G3R[4.0] | |
RPB13(1) | RPB13G3R | RPB13G3R[4.0] | |
Note:
|
RPn Port Pin | RPnG4R SFR | RPnG4R Bits | RPnG4R Value to Peripheral Pin Selection |
---|---|---|---|
RPA1(1) | RPA1G4R | RPA1G4R[4:0] | 00000 = OFF 00001 = SERCOM0_PAD2 00010 = OFF 00011 = SERCOM0_PAD0 00100 = SERCOM1_PAD3 00101 = OFF 00110 = SERCOM1_PAD0 00111 = TCC0_WO3 01000 = TCC0_WO1 01001 = TCC0_WO5 01010 = TCC1_WO3 01011 = TCC1_WO1 01100 = TCC1_WO5 01101 = TCC2_WO1 01110 = OFF 01111 = TC0_WO0 10000 = TC1_WO1 10001 = TC2_WO1 10010 = TC3_WO1 10011 = TC4_WO1 10100 = TC5_WO1 10101 = TC6_WO1 10110 = TC7_WO1 10111 = QSPI_CS 11000 = QSPI_DATA2 11001 = QSPI_DATA1 11010 = QSPI_DATA0 11011 = CCL_OUT1 11100 = Reserved 11101 = Reserved 11110 = Reserved 11111 = Reserved |
RPA2(1) | RPA2G4R | RPA2G4R[4.0] | |
RPA4 | RPA4G4R | RPA4G4R[4.0] | |
RPA5 | RPA5G4R | RPA5G4R[4.0] | |
RPA6 | RPA6G4R | RPA6G4R[4.0] | |
RPA8 | RPA8G4R | RPA8G4R[4.0] | |
RPA9 | RPA9G4R | RPA9G4R[4.0] | |
RPA10 | RPA10G4R | RPA10G4R[4.0] | |
RPA13(1) | RPA13G4R | RPA13G4R[4.0] | |
RPA14(1) | RPA14G4R | RPA14G4R[4.0] | |
RPB2(1) | RPB2G4R | RPB2G4R[4.0] | |
RPB3(1) | RPB3G4R | RPB3G4R[4.0] | |
RPB7 | RPB7G4R | RPB7G4R[4.0] | |
RPB10(1) | RPB10G4R | RPB10G4R[4.0] | |
RPB11(1) | RPB11G4R | RPB11G4R[4.0] | |
Note:
|