6.5.5.1.4 Input Mapping in PIC32CX-BZ3 Family of Devices

The following tables provide input mapping in PIC32CX-BZ3 family of devices

Table 6-2. Input Pin Selection Group 1
Peripheral Pin (pin name)	[pin name]R SFR	[pin name]R bits	[pin name]R Value to RPn Pin Selection
EXTINT0	EXTINT0R	EXTINT0R[3:0]	0000 = OFF 0001 = RPA3 0010 = RPA7 0011 = RPA11 0100 = RPB0⁽¹⁾ 0101 = RPB4 0110 = RPB8 0111 = RPB12⁽¹⁾ 1000 = RPA2⁽¹⁾ 1001 = RPA6 1010 = RPA10 1011 = RPA14 1100 = RPB3 1101 = RPB7 1110 = RPB11 1111 = RPA9
SERCOM0_PAD3	SCOM0P3R	SCOM0P3R[3:0]
SERCOM1_PAD2	SCOM1P2R	SCOM1P2R[3:0]
QD1	QD1R	QD1R[3:0]
CCLIN0	CCLIN0R	CCLIN0R[3:0]
CCLIN3	CCLIN3R	CCLIN3R[3:0]
TC0_WO0G1	TC0WO0G1R	TC0WO0G1R[3:0]
TC1_WO0G1	TC1WO0G1R	TC1WO0G1R[3:0]
TC2_WO0G1	TC2WO0G1R	TC2WO0G1R[3:0]
TC3_WO0G1	TC3WO0G1R	TC3WO0G1R[3:0]
TC4_WO0G1	TC4WO0G1R	TC4WO0G1R[3:0]
TC5_WO0G1	TC5WO0G1R	TC5WO0G1R[3:0]
TC6_WO0G1	TC6WO0G1R	TC6WO0G1R[3:0]
TC7_WO0G1	TC7WO0G1R	TC7WO0G1R[3:0]
Note: Denotes that these pins and their associated registers are not available in the 32-pin package.

Table 6-3. Input Pin Selection Group 2
Peripheral Pin (pin name)	[pin name]R SFR	[pin name]R bits	[pin name]R Value to RPn Pin Selection
EXTINT1	EXTINT1R	EXTINT1R[3:0]	0000 = OFF 0001 = RPA4 0010 = RPA8 0011 = RPA12 0100 = RPB1⁽¹⁾ 0101 = RPB5 0110 = RPB9 0111 = RPB13⁽¹⁾ 1000 = RPA3 1001 = RPA7 1010 = RPA11 1011 = RPB0⁽¹⁾ 1100 = RPB4 1101 = RPB8 1110 = RPB12⁽¹⁾ 1111 = RPA0⁽¹⁾
SERCOM0_PAD0	SCOM0P0R	SCOM0P0R[3:0]
SERCOM1_PAD3	SCOM1P3R	SCOM1P3R[3:0]
QD2	QD2R	QD2R[3:0]
CCLIN1	CCLIN1R	CCLIN1R[3:0]
CCLIN4	CCLIN4R	CCLIN4R[3:0]
TC0_WO0G2	TC0WO0G2R	TC0WO0G2R[3:0]
TC1_WO1G2	TC1WO1G2R	TC1WO1G2R[3:0]
TC2_WO1G2	TC2WO1G2R	TC2WO1G2R[3:0]
TC3_WO1G2	TC3WO1G2R	TC3WO1G2R[3:0]
TC4_WO1G2	TC4WO1G2R	TC4WO1G2R[3:0]
TC5_WO1G2	TC5WO1G2R	TC5WO1G2R[3:0]
TC6_WO1G2	TC6WO1G2R	TC6WO1G2R[3:0]
TC7_WO1G2	TC7WO1G2R	TC7WO1G2R[3:0]
Note: Denotes that these pins and their associated registers are not available in the 32-pin package.

Table 6-4. Input Pin Selection Group 3
Peripheral Pin (pin name)	[pin name]R SFR	[pin name]R bits	[pin name]R Value to RPn Pin Selection
EXTINT2	EXTINT2R	EXTINT2R[3:0]	0000 = OFF 0001 = RPA5 0010 = RPA9 0011 = RPA13⁽¹⁾ 0100 = RPB2* 0101 = RPB6 0110 = RPB10⁽¹⁾ 0111 = RPA0⁽¹⁾ 1000 = RPA4 1001 = RPA8 1010 = RPA12 1011 = RPB1⁽¹⁾ 1100 = RPB5 1101 = RPB9 1110 = RPB13⁽¹⁾ 1111 = RPA1⁽¹⁾
SERCOM1_PAD0	SCOM1P3R	SCOM1P3R[3:0]
QD3	QD3R	QD3R[3:0]
CCLIN2	CCLIN2R	CCLIN2R[3:0]
CCLIN5	CCLIN5R	CCLIN5R[3:0]
TC0_WO1G3	TC0WO1G3R	TC0WO1G3R[3:0]
TC1_WO0G3	TC1WO0G3R	TC1WO0G3R[3:0]
TC2_WO0G3	TC2WO0G3R	TC2WO0G3R[3:0]
TC3_WO0G3	TC3WO0G3R	TC3WO0G3R[3:0]
TC4_WO0G3	TC4WO0G3R	TC4WO0G3R[3:0]
TC5_WO0G3	TC5WO0G3R	TC5WO0G3R[3:0]
TC6_WO0G3	TC6WO0G3R	TC6WO0G3R[3:0]
TC7_WO0G3	TC7WO0G3R	TC7WO0G3R[3:0]
Note: Denotes that these pins and their associated registers are not available in the 32-pin package.

Table 6-5. Input Pin Selection Group 4
Peripheral Pin (pin name)	[pin name]R SFR	[pin name]R bits	[pin name]R Value to RPn Pin Selection
EXTINT3	EXTINT3R	EXTINT3R[3:0]	0000 = OFF 0001 = RPA6 0010 = RPA10 0011 = RPA14⁽¹⁾ 0100 = RPB3⁽¹⁾ 0101 = RPB7 0110 = RPB11⁽¹⁾ 0111 = RPA1⁽¹⁾ 1000 = RPA5 1001 = RPA9 1010 = RPA13⁽¹⁾ 1011 = RPB2⁽¹⁾ 1100 = RPB6 1101 = RPB10⁽¹⁾ 1110 = RPA8 1111 = RPA2⁽¹⁾
NMI	NMIR	NMIR[3:0]
SERCOM0_PAD2	SCOM0P2R	SCOM0P2R[3:0]
QD0	QD0R	QD0R[3:0]
TC0_WO1G4	TC0WO1G4R	TC0WO1G4R[3:0]
TC2_WO1G4	TC2WO1G4R	TC2WO1G4R[3:0]
TC3_WO1G4	TC3WO1G4R	TC3WO1G4R[3:0]
TC4_WO1G4	TC4WO1G4R	TC4WO1G4R[3:0]
TC5_WO1G4	TC5WO1G4R	TC5WO1G4R[3:0]
TC6_WO1G4	TC6WO1G4R	TC6WO1G4R[3:0]
TC7_WO1G4	TC7WO1G4R	TC7WO1G4R[3:0]
Note: Denotes that these pins and their associated registers are not available in the 32-pin package.

Table 6-6. Input Pin Selection Group 5
Peripheral Pin (pin name)	[pin name]R SFR	[pin name]R bits	[pin name]R Value to RPn Pin Selection
SERCOM0_PAD1	SCOM0P1R	SCOM0P1R[3:0]	0000 = OFF 0001 = RPA3 0010 = RPA5 0011 = RPA6 0100 = RPA7 0101 = RPB5 0110 = RPB6 0111 = RPB8 1000 = RPB9 `1001` = OFF `1010` = OFF `1011` = OFF `1100` = OFF `1101` = OFF `1110` = OFF `1111` = OFF
SERCOM1_PAD1	SCOM1P1R	SCOM1P1R[3:0]
REFI	REFIR	REFIR[3:0]

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