9.1.1 System Level Interface

The Cortex-M4F processor provides multiple interfaces using AMBA technology to provide high-speed, low-latency memory accesses. It supports unaligned data accesses and implements atomic bit manipulation that enables faster peripheral controls, system spinlocks and thread-safe Boolean data handling.

The Cortex-M4F processor has an MPU that provides:

• Fine grain memory control
• Enabling applications to utilize multiple privilege levels
• Separating and protecting code
• Data
• Stack on a task-by-task basis

In the automotive sector, these requirements are becoming critical in many embedded applications.