29.6.2.2 Enabling, Disabling and Resetting

The FREQM is enabled by writing a ‘1’ to the Enable bit in the Control A register (CTRLA.ENABLE). The peripheral is disabled by writing CTRLA.ENABLE=0.

The FREQM is Reset by writing a ‘1’ to the Software Reset bit in the Control A register (CTRLA.SWRST). On software Reset, all registers in the FREQM reset to their initial state, and the FREQM is disabled.

Then ENABLE and SWRST bits are write-synchronized.