11.7 RAM Properties
The following table shows the different access properties of the three RAM blocks, according to the different modes described in the previous chapters.
Access Condition | Data RAM | Tag RAM | Metadata RAM |
---|---|---|---|
CPU access when CMCC DISABLED | Read/Write | no Read/Write - hardfault | no Read/Write - hardfault |
CPU access when CMCC ENABLED | CACHE section configured: Read/Write(1) TCM section configured: Read/Write | no Read/Write - hardfault | no Read/Write - hardfault |
Debugger access when CMCC DISABLED | Read/Write | Read/Write | Read/Write |
Debugger access when CMCC ENABLED | CACHE section configured: Read/Write(1) TCM section configured: R/W | no Read/Write | no Read/Write |
CPU Test access when CMCC DISABLED | Read/Write | Read/Write | Read/Write |
CPU Test access when CMCC ENABLED | CACHE section configured: Read/Write(1) TCM section configured: Read/Write | no Read/Write | no Read/Write |
Note:
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