30.8.8 Channel n Control

This register allows the user to configure channel n. To write to this register, do a single, 32-bit write of all the configuration data.

Name: CHANNEL
Offset: 0x20 + n*0x08 [n=0..31]
Reset: 0x00008000
Property: PAC Write-Protection

Bit 3130292827262524 
          
Access  
Reset  
Bit 2322212019181716 
          
Access  
Reset  
Bit 15141312111098 
 ONDEMANDRUNSTDBY  EDGSEL[1:0]PATH[1:0] 
Access RWRWRWRWRWRW 
Reset 100000 
Bit 76543210 
  EVGEN[6:0] 
Access RWRWRWRWRWRWRW 
Reset 0000000 

Bit 15 – ONDEMAND Generic Clock On Demand

This bit is used to determine whether the generic clock is requested.

ValueDescription
0Generic clock for a channel is always on, if the channel is configured and generic clock source is enabled.
1Generic clock is requested on demand while an event is handled

Bit 14 – RUNSTDBY Run in Standby

This bit is used to define the behavior during Idle and Standby Sleep mode.

ValueDescription
0The channel is disabled in Idle and Standby Sleep mode.
1The channel is not stopped in Idle and Standby Sleep mode and depends on the CHANNEL.ONDEMAND bit.

Bits 11:10 – EDGSEL[1:0] Edge Detection Selection

These bits set the type of edge detection to be used on the channel.

These bits must be written to zero when using the asynchronous path.

ValueNameDescription
0x0NO_EVT_OUTPUTNo event output when using the resynchronized or synchronous path
0x1RISING_EDGEEvent detection only on the rising edge of the signal from the event generator
0x2FALLING_EDGEEvent detection only on the falling edge of the signal from the event generator
0x3BOTH_EDGESEvent detection on rising and falling edges of the signal from the event generator

Bits 9:8 – PATH[1:0] Path Selection

These bits are used to choose which path is used by the selected channel.

Note: The path choice can be limited by the channel source; see USERm from Related Links.
Important: Only EVSYS channel 0 to 11 can be configured as synchronous or resynchronized.
ValueNameDescription
0x0SYNCHRONOUSSynchronous path
0x1RESYNCHRONIZEDResynchronized path
0x2ASYNCHRONOUSAsynchronous path
Other—Reserved

Bits 6:0 – EVGEN[6:0] Event Generator Selection

These bits are used to choose the event generator to connect to the selected channel.

Table 30-2. Event Generator Selection
ValueNameDescription
0x00NoneNo event generator selected
0x01 - 0x08RTC_PERxRTC period x=0..7
0x09 - 0x0CRTC_CMPxRTC comparison x=0..3
0x0DRTC_TAMPERRTC tamper detection
0x0ERTC_OVFRTC overflow
0x0F - 0x12EIC_EXTINTxEIC external interrupt x=0..3
0x13 - 0x16DMAC_CHxDMA channel x=0..3
0x17PAC_ACCERRPAC Acc. error
0x18TCC0_OVFTCC0 overflow
0x19TCC0_TRGTCC0 trigger event
0x1ATCC0_CNTTCC0 counter
0x1B-0x20TCC0_MCxTCC0 match/compare x=0..5
0x21TCC1_OVFTCC1 overflow
0x22TCC1_TRGTCC1 trigger event
0x23TCC1_CNTTCC1 counter
0x24 - 0x29TCC1_MCxTCC1 match/compare x=0..5
0x2ATCC2_OVFTCC2 overflow
0x2BTCC2_TRGTCC2 trigger event
0x2CTCC2_CNTTCC2 counter
0x2D - 0x2ETCC2_MCxTCC2 match/compare x=0..1
0x2FTC0_OVFTC0 overflow
0x30-0x31TC0_MCxTC0 match/compare x=0..1
0x32TC1_OVFTC1 overflow
0x33 - 0x34TC1_MCxTC1 match/compare x=0..1
0x35TC2_OVFTC2 overflow
0x36 - 0x37TC2_MCxTC2 match/compare x=0..1
0x38TC3_OVFTC3 overflow
0x39 - 0x3ATC3_MCxTC3 match/compare x=0..1
0x3BTC4_OVFTC4 overflow
0x3C - 0x3DTC4_MCxTC4 match/compare x=0..1
0x3ETC5_OVFTC5 overflow
0x3F - 0x40TC5_MCxTC5 match/compare x=0..1
0x41TC6_OVFTC6 overflow
0x42 - 0x43TC6_MCxTC6 match/compare x=0..1
0x44TC7_OVFTC7 overflow
0x45 - 0x46TC7_MCxTC7 match/compare x=0..1
0x47ADC_RESRDYADC end-of-scan ready interrupt
0x48 - 0x49Not used—
0x4A - 0x4BAC_COMPxAC comparator, x=0..1
0x4CAC_WIN_0AC0 window
0x4DNot used—
0x4E - 0x4FCCL_LUTOUTxCCL LUTOUT x-0..1
0x50ZB_TX_TS_ACTIVEZB transmit packet active time
0x51ZB_RX_TS_ACTIVEZB receive packet active time