44.6.2.3 Enabling, Disabling, and Resetting

The TCC is enabled by writing a '1' to the Enable bit in the Control A register (CTRLA.ENABLE bit (CTRLA <1>) ). The TCC is disabled by writing a zero to CTRLA.ENABLE bit (CTRLA <1>) .

The TCC is reset by writing '1' to the Software Reset bit in the Control A register (CTRLA.SWRST bit (CTRLA <0>)). All registers in the TCC, except DBGCTRL, will be reset to their initial state, and the TCC will be disabled. Refer to Control A register for details.

The TCC should be disabled before the TCC is reset to avoid undefined behavior.

To ensure deterministic operation, the configuration of the TCC module should always be set/checked before operation is enabled.