30.9.1.10 Channel Servicing

After initialization, each channel will require periodic servicing.

The following software flows can be performed concurrently and in any order:

  • Servicing the AHB Block (DMA) Interrupts
  • Servicing the MediaLB Interrupts
  • Polling for MediaLB System Commands

Servicing the AHB Block (DMA) Interrupts

The ACMR0, ACMR1, ACTL, ACSR0, and ACSR1 registers are accessible directly via APB reads and writes.

  1. Program the ACMRn registers to enable interrupts from all active DMA channels.
  2. Select the status clear method: ACTL.SCE = 0 (hardware clears on read), ACTL.SCE = 1 (software writes a ‘1’ to clear).
  3. Select 1 or 2 interrupt signals: ACTL.SMX = 0 (one interrupt for channels 0–31 on MediaLB INT0AHB and another interrupt for channels 32–63 on MediaLB INT1AHB), ACTL.SMX = 1 (single interrupt for all channels on MediaLB INT0AHB).
  4. Wait for an interrupt from MediaLB INT0AHB or INT1AHB.
  5. Read the ACSRn registers to determine which channel or channels are causing the interrupt.
  6. If ACTL.SCE = 1, write the results of step 5 back to ACSR0 and ACSR1 to clear the interrupt.
  7. Select a logical channel (N = 0–63) with an interrupt to service.
  8. Read the ADT entry for channel N
    1. Determine the active page (ping or pong) via the PG bit.
    2. Determine which page(s) are done via the DNEn bits.
    3. Determine which channels encountered an AHB error via the ERRn bit.
    4. Determine which asynchronous and control Rx channel pages contain a packet start via the PSn bit (extract the PML).
  9. Reprogram the expired or broken AHB pages through Step 3 and Step 4 in section “Program the AHB Block DMAs”.
  10. Repeat steps 6–9 for all channels with pending interrupts.
  11. Repeat steps 4–10 while there are active channels.
Note: Channels that receive an AHB error response are disabled (CE = 0) by hardware.

Servicing the MediaLB Interrupts

  1. Select the MediaLB Channel Status Register (MSn) to be cleared by software, writing a ‘0’ to the appropriate bits.
  2. Program MIEN to enable protocol error interrupts for all active MediaLB channels (MIEN.CTX_PE = 1, MIEN.CRX_PE = 1, MIEN.ATX_PE = 1, MIEN.ARX_PE = 1, MIEN.SYNC_PE = 1, and MIEN.ISOC_PE = 1)
  3. Wait for an INTMLB interrupt.
  4. Read the MSn registers to determine which channel(s) are causing the interrupt.
  5. Read RSTS/WSTS of the appropriate CDT(s) to determine the interrupt type.
  6. Clear RSTS/WSTS errors to resume channel operation.
    1. For synchronous channels: WSTS[3] = 0
    2. For isochronous channels: WSTS[2:1] = 00
    3. For asynchronous and control channels: RSTS[4]/WSTS[4] = 0 and RSTS[2]/ WSTS[2] = 0

Polling for MediaLB System Commands

The MLB supports the MediaLB System Commands (e.g. MlbScan, MlbReset, MOST_Unlock). The MediaLB System Status (MSS) Register is used to detect a System Command received from the MediaLB Controller. The MLB automatically sends the appropriate system response to the MediaLB Controller.

The procedure for the application is:

  1. The application periodically polls the MSS register.
  2. Clear by writing a ‘0’ to the appropriate bit in MSS register after the application finishes the service.
  3. If MSS.SWSYSCMD = 1, read the MSD register to receive the system data sent from MediaLB Controller.