23.8.13 Window Monitor Upper Threshold
Symbol | Description | Symbol | Description | Symbol | Description |
---|---|---|---|---|---|
R | Readable bit | HC | Cleared by Hardware | (Grey cell) | Unimplemented |
W | Writable bit | HS | Set by Hardware | X | Bit is unknown at Reset |
K | Write to clear | S | Software settable bit | — | — |
Name: | WINUT |
Offset: | 0x24 |
Reset: | 0x0000 |
Property: | PAC Write-Protection, Enable-Protected |
Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
Access | |||||||||
Reset |
Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
WINUT[23:16] | |||||||||
Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
WINUT[15:8] | |||||||||
Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
WINUT[7:0] | |||||||||
Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Bits 23:0 – WINUT[23:0] Window Upper Threshold
When the Window Monitor bit in Interrupt Enable Set register, INTENSET.WINMON= 1, and the VALUE register result of the measurement depends on CTRLC.WINMON, the Window Monitor bit in the Interrupt Flag Status and Clear register, INTFLAG.WINMON, will be set and an interrupt request is generated.