11.4.3 Boot Configuration
The Boot configuration page contains security information used by the Boot ROM. Information such as the Boot ROM CRC-32 value will be stored within this reserved space. Both BootCFG1 and BootCFG2 have the same mapping:
Address | Register | Bit Field | Start Bit | Size (bits) | Value after chip erase | Description |
---|---|---|---|---|---|---|
0A002000 | BLDRCFG | <See Below:> | 0xC0000000 | Bootloader configurations | ||
PFM_BCRP | 0 | 1 | 0x0 | Boot Config Page read protect bit | ||
PFM_BCWP | 1 | 1 | 0x0 | Boot Config Page write protect bit | ||
BROM_EN_BFMCHK | 28 | 1 | 0x0 | BFM CRC check enable | ||
BROM_EN_PLL | 29 | 1 | 0x0 | PLL config enable for BFM processings | ||
BROM_EN_DALUN | 30 | 1 | 0x1 | Allow BootRom to apply DALUN | ||
BROM_EN_ RWLOCKS | 31 | 1 | 0x1 | Allow BootRom to apply Read & Write locks | ||
0A002004 | BROM_BSEQ | <See Below:> | 0xFFFE0001 | Sequence # for BootCfg page | ||
SEQNUM | 0 | 16 | 0x0001 | Boot ROM Sequence Number | ||
SEQBAR | 16 | 16 | 0xFFFE | 1’s Complement of Seq. # | ||
0A002008 |
BFM_CHK_ TABLEPTR | 0 | 32 | 0xFFFFFFFF | BFM CRC table pointer | |
0A002020 - 0A00207F | Reserved | |||||
0A002080 |
KEYVAL_ TZ0_CE_ALL | 0 | 128 | 0xFFFF…FF | Chip erase 3 (TZ0_ALL) access key | |
0A002090 |
CELOCK_ TZ0_CE_ALL | 0 | 32 | 0xFFFFFFF | Chip erase lock for TZ0_ALL | |
0A002094 | Reserved | 0 | 96 | |||
0A0020A0 |
KEYVAL_ CRCCMD | 0 | 128 | 0xFFFF…FF | CRC access key | |
0A0020B0 |
KEYCONFIG_ CRCCMD | 0 | 128 | 0xFFFF…FF | Config for CRC access key | |
0A0020C0 |
KEYVAL_ HOSTDALELEV | 0 | 128 | 0xFFFF…FF | Host-authenticated DAL elevation key | |
0A0020D0 |
KEYCONFIG_ HOSTDALELEV | 0 | 128 | 0xFFFF…FF | Config for Host-authenticated DAL elevation key | |
0A0020E0 | ROM_CTRLA | 0 | 32 | 0xFFFFFFFF |
ROM.CTRLA setting (if BROM_PLL_EN=1) | |
0A0020E4 | FCR_CTRLA | 0 | 32 | 0xFFFFFFFF |
FCR.CTRLA setting (if BROM_PLL_EN=1) | |
0A0020E8 |
RPMU_ VREGCTRL | 0 | 32 | 0xFFFFFFFF |
RPMU.VREGCTRL setting (if BROM_PLL_EN=1) | |
0A0020EC | PLL0_CTRL | 0 | 32 | 0xFFFFFFFF |
PLL0.CTRL setting (if BROM_PLL_EN=1) | |
0A0020F0 | PLL0_FBDIV | 0 | 32 | 0xFFFFFFFF |
PLL0.FBDIV setting (if BROM_PLL_EN=1) | |
0A0020F4 | PLL0_REFDIV | 0 | 32 | 0xFFFFFFFF |
PLL0.REFDIV setting (if BROM_PLL_EN=1) | |
0A0020F8 |
PLL0_ POSTDIVA | 0 | 32 | 0xFFFFFFFF |
PLL0.POSTDIVA setting ( if BROM_PLL_EN=1) | |
0A0020FC |
MCLK_ CLKDIV1 | 0 | 32 | 0xFFFFFFFF |
MCLK.CLKDIV1 setting (if BROM_PLL_EN=1) | |
0A002100 |
GCLK_ GENCTRL0 | 0 | 32 | 0xFFFFFFFF |
GCLK.GENCTRL0 setting (if BROM_PLL_EN=1) | |
0A002104 | Reserved | 0 | 96 | |||
0A002110 |
BROM_ BOOTCFGCRC | 0 | 128 | 0xFFFFFFFF | CRC table for bootcfg page | |
0A002120 |
BROM_ PAGEEND | 0 | 0 | 0xFFFFFFFF | Marker for end of verified data |
- PFM BootCfg read & write protects are disabled (BCWP=0, BCRP=0)
- BROM_EN_BFMCHK = 0, BFM CRC check disabled
- BROM_EN_PLL = 0, PLL config disabled
- BROM_EN_DALUN is set (DAL setting will be applied at Boot ROM exit)
- BROM_EN_RWLOCKS is set (Locks will be applied at Boot ROM exit)