22.6.7 Synchronization Busy

Table 22-9. Register Bit Attribute Legend
SymbolDescriptionSymbolDescriptionSymbolDescription
RReadable bitHCCleared by Hardware(Grey cell)Unimplemented
WWritable bitHSSet by HardwareXBit is unknown at Reset
KWrite to clearSSoftware settable bit
Name: SYNCBUSY
Offset: 0x08
Reset: 0x00000000
Property: -

Bit 3130292827262524 
          
Access  
Reset  
Bit 2322212019181716 
          
Access  
Reset  
Bit 15141312111098 
          
Access  
Reset  
Bit 76543210 
   CLEARALWAYSONRUNSTDBYWENENABLE  
Access RRRRR 
Reset 00000 

Bit 5 – CLEAR Clear Synchronization Busy

ValueDescription
0Write synchronization of the CLEAR register is complete.
1Write synchronization of the CLEAR register is ongoing.

Bit 4 – ALWAYSON Always-On Synchronization Busy

ValueDescription
0Write synchronization of the CTRLA.ALWAYSON bit is complete.
1Write synchronization of the CTRLA.ALWAYSON bit is ongoing.

Bit 3 – RUNSTDBY Run-In-Standby Synchronization Busy

ValueDescription
0Write synchronization of the CTRLA.RUNSTDBY bit is complete.
1Write synchronization of the CTRLA.RUNSTDBY bit is ongoing.

Bit 2 – WEN Window Enable Synchronization Busy

ValueDescription
0Write synchronization of the CTRLA.WEN bit is complete.
1Write synchronization of the CTRLA.WEN bit is ongoing.

Bit 1 – ENABLE Enable Synchronization Busy

ValueDescription
0Write synchronization of the CTRLA.ENABLE bit is complete.
1Write synchronization of the CTRLA.ENABLE bit is ongoing.