8 Quadrature Decoder of SAME70 MCU
The Timer Counter (TC) of the SAME70 device embeds a quadrature decoder (QDEC) which can be driven by the encoder pulses. When enabled, the QDEC performs the input line filtering, decoding of quadrature signals, and facilitates the motor position and speed measurement. The quadrature decoder and its functionality are shown in the following figure.
The QDEC can be configured in Position mode or Speed mode to measure the position or speed of the motor, but not both simultaneously. As shown in the previous figure, Channel 0 of TC is used for position and speed measurement, and Channel 1 is used for rotation measurement. Channel 2 is used as a time-base for speed measurement in Speed mode. TIOA0, TIOB0, and TIOB1 are the inputs to the QDEC to which the encoder pulses are connected.
Accurate position measurement is important for FOC implementation. If the QDEC is configured in Speed mode, position must be calculated from speed measurement, which will introduce some software delay leading to erroneous position value at any instant. Therefore, for applications like FOC, the QDEC must be configured in Position mode to measure the precise position at any instant. Speed can be calculated from position as shown in the following sections. In this case, Channel 2 of the TC is not needed, as it is used only to provide time-base in Speed mode. Position value is reset at every index pulse as shown in the previous figure. If the index pulse is not present, the position is reset after every 360 mechanical degrees.
The TC_CMR and TC_BMR registers must be configured to obtain position information from the QDEC. Follow these steps to configure the registers:
- The QDEN and POSEN bits of the TC_BMR register must be enabled to set channel ‘0’ in position mode
- The EDGPHA bit of the TC_BMR register must be enabled for channel ‘0’ to count all the edges of Phase A and Phase B
- Configure Channels ‘0’ and ‘1’ in Capture mode by setting the WAVE bit to ‘0’ in the TC_CMR register
- Select XC0 as clock for Channels ‘0’ and ‘1’ by setting the TCCLKS bit to '5' in the TC_CMR register
- Select ‘TIOA’ as the external trigger reset for Channel ‘0’ by setting the ABETRG bit to ‘1’ in the TC_CMR register
- Select ‘Rising Edge’ as the external trigger reset edge for channel ‘0’ by setting the ETRGEDG bit to ‘1’ in the TC_CMR register
Depending on the application, the other bits of the mentioned registers can also be set for filtering, swapping encoder phases, and so on.
Position and rotation can be obtained from the TC_CV0 and TC_CV1 registers.
The TC_QIMR, TC_QIER and TC_QIDR registers can be used for information, and action to be taken based on direction change, index pulse arrival and quadrature error.
All the bit fields of the registers are described in the SAM E70 Data Sheet (DS60001527).
The position information obtained from the registers is a mechanical position (Ɵm). The Electrical position (Ɵe) can be obtained by multiplying mechanical position by the number of pole pairs.