10.1.2 PDC Naming Conventions

Note: The names of ports, instances, and nets in an imported netlist are sometimes referred to as their original names.

10.1.2.1 Rules for Displaying Original Names

Port names appear exactly as they are defined in a netlist.

Instances and nets display the original names plus an escape character (\) before each backslash (/), and each forward slash (\) is not a hierarchy separator. For example, the instance named A/\B is displayed as A\/\\B.

10.1.2.2 Which Name Do I Use in PDC Commands?

When writing PDC commands, follow these rules:

  • Always use the macro name as it appears in the netlist.
  • Names from a netlist:
    • For port names, use the names exactly as they appear in the netlist.
    • For instance and net names, add an escape character (\) before each backslash (\) and each forward slash (/) that is not a hierarchy separator.
  • For wildcard names, always add an extra backslash (\) before each backslash.
  • Always apply the PDC syntax conventions to any name in a PDC command.

The following table provides examples of names as they appear in an imported netlist and the names as they should appear in a PDC file.

Table 10-3. Sample Names in an Imported Netlist and PDC File
Name and Its LocationName in the Imported NetlistName to Use in PDC File
Port name in a netlistA/:B1A/:B1
Instance name in a netlistA/:B1 A$(1)A\\/:B1 A$(1)
Instance name in the netlist but using a wildcard character in a PDC fileA/:B1A\\\\/:B*
Net name in a netlistNet1/:net1Net1\\/:net1

When exporting PDC commands, the software always exports names using the PDC rules described in this section.

10.1.2.3 Case Sensitivity When Importing PDC Files

The following table lists the case sensitivity in the PDC file based on the source netlist.

Table 10-4. Case Sensitivity in the PDC File Based on a Source Netlist
File TypeCase Sensitivity
VerilogNames in the netlist are case sensitive.
VHDLNames in the netlist are not case sensitive unless those names appear between slashes (\).

For example, in VHDL, capital A and lowercase a are the same name, but \A\ and \a\ are two different names. However, in a Verilog netlist, an instance named A10 fails, if spelled as a10 in the set_io command:

set_io -port_name A10 -pin_name W5 (This command succeeds).