20.2.8 References
(Ask a Question)See the following reference documents for further details:
- Configuration of the MSS clocks.
- For detailed information about the MSS clocking features, see PolarFire Family Clocking Resources User Guide .
- Configuration of the MSS interfaces to the FPGA fabric.
- For detailed information about the MSS Fabric Interface Controller (FIC) features, see PolarFire SoC FPGA MSS Technical Reference Manual .
- Selection and assignment of the MSS peripherals to the MSS dedicated
I/Os and/or the FPGA fabric dedicated peripheral interfaces.
- For detailed information about the MSS Peripherals features, see PolarFire SoC FPGA MSS Technical Reference Manual .
- Configuration of the MSS Bank voltages and I/O standards and attributes.
- For detailed information about the MSS Banks and I/Os features, see PolarFire FPGA and PolarFire SoC FPGA User I/O User Guide .
- Configuration of the MSS DDR memories (DDR3/L, DDR4, LPDDR3, and LPDDR4).
- For detailed information about the MSS DDR4, DDR3, LPDDR3, and LPDDR4 features, see PolarFire Family Memory Controller User Guide .
- Configuration of the MSS debug features.
- For detailed information about the MSS debug features, see PolarFire SoC FPGA MSS Technical Reference Manual .