1.4 Configuration Bits
The Configuration bits are stored in the User Configuration Ax and User Configuration B
Flash memory areas. These bits can be programmed (= 0) or erased (=
1) to select various device configurations. There are two types of
Configuration bits: system operation bits and code-protect bits. The system operation
bits determine the power-on settings for system-level components, such as the Watchdog
Timer. The code-protect bits prevent program memory from being read and written. Table 1-7 lists the Configuration Words of the dsPIC33AK512MC510 and dsPIC33AK512MPS512 family devices.
Refer to the device data sheet for the full Configuration Word register
descriptions.
In addition, both the two regions (in single boot) and the three regions (in dual boot) also have a backup copy. The configuration data are automatically loaded from the Flash Configuration Words to the proper Configuration Shadow registers during device Resets. The locations of the CFGA1, CFGA2 and CFGB registers and their backups are shown in Table 1-7. The primary and backup registers should be programmed at the same time or following the order described in Programming in Dual Partition Mode.
| Configuration Word Name | Address | Backup Location Address | Configuration Area | Description |
|---|---|---|---|---|
| FCP | 0x7F3000 | 0x7F3800 | UCA1(1) | This Configuration Word enables the Flash protection. |
| FICD | 0x7F3010 | 0x7F3810 | Debugger Configuration register. | |
| FDEVOPT | 0x7F3020 | 0x7F3820 | This word configures some peripherals’ features. | |
| FWDT | 0x7F3030 | 0x7F3830 | This Configuration Word controls the Watchdog Timer. | |
| FPRCTRL0 | 0x7F4000 | 0x7F4800 | UCB | These Configuration Words allow definitions of up to eight memory regions with limitations on different Flash operations. FPRCTRLx Word enables the region and specifies what kind of Flash access should be restricted (erase, programming, reading, CRC calculation and so on). FPRSTx and FPRENDx should be programmed with the addresses of the first and last 4-Kbyte pages included in the region. |
| FPRST0 | 0x7F4004 | 0x7F4804 | ||
| FPREND0 | 0x7F4008 | 0x7F4808 | ||
| FPRCTRL1 | 0x7F4010 | 0x7F4810 | ||
| FPRST1 | 0x7F4014 | 0x7F4814 | ||
| FPREND1 | 0x7F4018 | 0x7F4818 | ||
| FPRCTRL2 | 0x7F4020 | 0x7F4820 | ||
| FPRST2 | 0x7F4024 | 0x7F4824 | ||
| FPREND2 | 0x7F4028 | 0x7F4828 | ||
| FPRCTRL3 | 0x7F4030 | 0x7F4830 | ||
| FPRST3 | 0x7F4034 | 0x7F4834 | ||
| FPREND3 | 0x7F4038 | 0x7F4838 | ||
| FPRCTRL4 | 0x7F4040 | 0x7F4840 | ||
| FPRST4 | 0x7F4044 | 0x7F4844 | ||
| FPREND4 | 0x7F4048 | 0x7F4848 | ||
| FPRCTRL5 | 0x7F4050 | 0x7F4850 | ||
| FPRST5 | 0x7F4054 | 0x7F4854 | ||
| FPREND5 | 0x7F4058 | 0x7F4858 | ||
| FPRCTRL6 | 0x7F4060 | 0x7F4860 | ||
| FPRST6 | 0x7F4064 | 0x7F4864 | ||
| FPREND6 | 0x7F4068 | 0x7F4868 | ||
| FPRCTRL7 | 0x7F4070 | 0x7F4870 | ||
| FPRST7 | 0x7F4074 | 0x7F4874 | ||
| FPREND7 | 0x7F4078 | 0x7F4878 | ||
| FIRT | 0x7F4080 | 0x7F4880 | This word enables the Immutable Root of Trust Regions mode. | |
| FSECDBG | 0x7F4090 | 0x7F4890 | This word enables the Secure Debug mode. | |
| FTPED | 0x7F40A0 | 0x7F48A0 | This word allows permanently disabling Chip Erase and external programming. | |
| FEPUCB | 0x7F40B0 | 0x7F48B0 | Writing 0x84C1F396 in this Configuration Word disables the erase operation on the UCB area. | |
| FWPUCB | 0x7F40C0 | 0x7F48C0 | Writing 0x5B9B12E4 in this Configuration Word disables the programming operation on the UCB area. | |
| FBOOT | 0x7F40D0 | 0x7F48D0 | This word allows the selection between single and dual boot modes. | |
| FCP | 0x7FB000 | 0x7FB800 | UCA2(1) | This Configuration Word enables the Flash protection. |
| FICD | 0x7FB010 | 0x7FB810 | Debugger Configuration Register. | |
| FDEVOPT | 0x7FB020 | 0x7FB820 | This word configures some peripherals' features. | |
| WDT | 0x7FB030 | 0x7FB830 | This Configuration Word controls the Watchdog Timer. | |
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Note:
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