3.2 Page Erase

This algorithm (Table 3-2) erases one page of the Code Flash memory. The erase address is page size-aligned and its least significant parts are “don't care” bits. The Page Erase procedure does not have an effect for the User OTP memory. If FPED or Code-Protect have been enabled, Page Erase will have no effect against the User Configuration A and B areas. Like Bulk Erase, the Page Erase command may have no effect when targeting the UCA page, UCB page or an address range with a security descriptor defining the page as hardware write-protected.

Table 3-2. Page Erase Algorithm
ICSP™ Sequence	ICSP Command Code	Data/Opcode	Instruction Executed
Step 1: Initialize pointers. Move VISI address to W8 and NVMCON address to W9.
`CMDEXEC`	`00`	`0xA0001F03`	`MOV.SL #VISI, W8`
`CMDEXEC`	`00`	`0xA400C003`	`MOV.SL #NVMCON, W9`
Step 2: Move NVMCON address to W0.
`CMDEXEC`	`00`	`0x00000309`	`MOV.L W9, W0`
Step 3: Write 0x4003 to NVMCON to set up for the Page Erase NVM operation.
`CMDSEQWR`	`10`	`0x00004003`	`MOV.L #PGEDx<31:0>, [W0++]`
Step 4: Initialize NVMADR with any address on the target page.
`CMDSEQWR`	`10`	EraseAddress[31:0]	`MOV.L #PGEDx<31:0>, [W0++]`
Step 5: Set the WR bit (NVMCON[15]) to start the NVM operation and move NVMCON to VISI.
`CMDEXEC`	`00`	`0x8E900431`	`MOVS.W #0xC003, [W9]`
`CMDEXEC`	`00`	`0x83892400`	`MOV.L [W9], [W8]`
Step 6: Provide clocks to complete execution of the prior move of NVMCON to VISI by executing a second move of NVMCON to VISI, then shift VISI on PGEDx.
`CMDEXEC`	`00`	`0x83892400`	`MOV.L [W9], [W8]`
`CMDRD`	`01`	VISI
Step 7: Repeat Step 6 to poll the WR bit (NVMCON[15]) until it is clear, indicating completion.