Benefits/Tradeoffs

Jitter:

LVPECL can offer the best jitter performance, followed by LVDS, and then CMOS. However, CMOS can usually provide better phase noise, albeit with slower rise and fall times that result in degraded jitter in some cases.

Power:

For the best power consumption, use CMOS or LVDS. LVPECL is faster, but consumes more power.

Speed:

HCSL and LVPECL are faster, but can consume more power. LVDS is faster than CMOS.

Single-Ended vs. Differential:

Differential signals are resistant to common mode noise, which single-ended techniques are susceptible to; plus, there are fewer EMI concerns. Additionally, differential signals have better rise and fall times. However, sinewave generally offers the best phase noise, followed by CMOS, then differential.

Ease of Use:

LVPECL requires external resistors for termination at both the transmitter and receiver ends. LVDS requires only a single resistor at the receiver and no termination is needed for short CMOS transmission lines.

In many applications, the receiver will dictate the logic format.

The online versions of the documents are provided as a courtesy. Verify all content and data in the device’s PDF documentation found on the device product page.