38.4.17 SPI Mode Requirements

Table 38-23.
Standard Operating Conditions (unless otherwise stated)
Param No.	Sym.	Characteristic	Min.	Typ. †	Max.	Units	Conditions
SP70*	T_SSL2_SCH, T_SSL2_SCL	SS↓ to SCK↓ or SCK↑ input	2.25*T_CY	—	—	ns
SP71*	T_SCH	SCK input high time	T_CY + 20	—	—	ns
SP72*	T_SCL	SCK input low time	T_CY + 20	—	—	ns
SP73*	T_DIV2_SCH, T_DIV2_SCL	Setup time of SDI data input to SCK edge	100	—	—	ns
SP74*	T_SCH2_DIL, T_SCL2_DIL	Hold time of SDI data input to SCK edge	100	—	—	ns
SP75*	T_DOR	SDO data output rise time	—	10	25	ns	3.0V ≤ V_DD ≤ 5.5V
SP75*	T_DOR	SDO data output rise time	—	25	50	ns	1.8V ≤ V_DD ≤ 5.5V
SP76*	T_DOF	SDO data output fall time	—	10	25	ns
SP77*	T_SSH2_DOZ	SS↑ to SDO output high-impedance	10	—	50	ns
SP78*	T_SCR	SCK output rise time	—	10	25	ns	3.0V ≤ V_DD ≤ 5.5V
SP78*	T_SCR	SCK output rise time	—	25	50	ns	1.8V ≤ V_DD ≤ 5.5V
SP79*	T_SCF	SCK output fall time	—	10	25	ns
SP80*	T_SCH2_DOV, T_SCL2_DOV	SDO data output valid after SCK edge	—	—	50	ns	3.0V ≤ V_DD ≤ 5.5V
SP80*	T_SCH2_DOV, T_SCL2_DOV	SDO data output valid after SCK edge	—	—	145	ns	1.8V ≤ V_DD ≤ 5.5V
SP81*	T_DOV2_SCH, T_DOV2_SCL	SDO data output setup to SCK edge	1 T_CY	—	—	ns
SP82*	T_SSL2_DOV	SDO data output valid after SS↓ edge	—	—	50	ns
SP83*	T_SCH2_SSH, T_SCL2_SSH	SS ↑after SCK edge	1.5 T_CY + 40	—	—	ns
* These parameters are characterized but not tested. † Data in “Typ” column is at 3.0V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested.

Table 38-24.
Standard Operating Conditions (unless otherwise stated)
Param No.	Sym.	Characteristic	Min.	Typ. †	Max.	Units	Conditions
SP70*	T_SSL2_SCH, T_SSL2_SCL	SS↓ to SCK↓ or SCK↑ input	2.25*T_CY	—	—	ns
SP71*	T_SCH	SCK input high time	T_CY + 20	—	—	ns
SP72*	T_SCL	SCK input low time	T_CY + 20	—	—	ns
SP73*	T_DIV2_SCH, T_DIV2_SCL	Setup time of SDI data input to SCK edge	100	—	—	ns
SP74*	T_SCH2_DIL, T_SCL2_DIL	Hold time of SDI data input to SCK edge	100	—	—	ns
SP75*	T_DOR	SDO data output rise time	—	10	25	ns	3.0V ≤ V_DD ≤ 5.5V
SP75*	T_DOR	SDO data output rise time	—	25	50	ns	1.8V ≤ V_DD ≤ 5.5V
SP76*	T_DOF	SDO data output fall time	—	10	25	ns
SP77*	T_SSH2_DOZ	SS↑ to SDO output high-impedance	10	—	50	ns
SP80*	T_SCH2_DOV, T_SCL2_DOV	SDO data output valid after SCK edge	—	—	50	ns	3.0V ≤ V_DD ≤ 5.5V
SP80*	T_SCH2_DOV, T_SCL2_DOV	SDO data output valid after SCK edge	—	—	145	ns	1.8V ≤ V_DD ≤ 5.5V
SP81*	T_DOV2_SCH, T_DOV2_SCL	SDO data output setup to SCK edge	1 T_CY	—	—	ns
SP82*	T_SSL2_DOV	SDO data output valid after SS↓ edge	—	—	50	ns
SP83*	T_SCH2_SSH, T_SCL2_SSH	SS ↑ after SCK edge	1.5 T_CY + 40	—	—	ns
* These parameters are characterized but not tested. † Data in “Typ” column is at 3.0V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested.