11.13.19 PIR1
Note:
- Interrupt flag bits get set when an interrupt condition occurs, regardless of the state of its corresponding enable bit or the global enable bit. User software must ensure the appropriate interrupt flag bits are clear prior to enabling an interrupt.
- The external interrupt GPIO pin is selected by the INTxPPS register.
Name: | PIR1 |
Address: | 0x4B3 |
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
ADCH4IF | ADCH3IF | ADCH2IF | CM1IF | ACTIF | ADIF | ADCH1IF | INT0IF | ||
Access | R/W/HS | R/W/HS | R/W/HS | R/W/HS | R/W/HS | R/W/HS | R/W/HS | R/W/HS | |
Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Bit 7 – ADCH4IF ADC Context 4 Threshold Interrupt Flag
Value | Description |
---|---|
1 | Interrupt has occurred (must be cleared by software) |
0 | Interrupt event has not occurred |
Bit 6 – ADCH3IF ADC Context 3 Threshold Interrupt Flag
Value | Description |
---|---|
1 | Interrupt has occurred (must be cleared by software) |
0 | Interrupt event has not occurred |
Bit 5 – ADCH2IF ADC Context 2 Threshold Interrupt Flag
Value | Description |
---|---|
1 | Interrupt has occurred (must be cleared by software) |
0 | Interrupt event has not occurred |
Bit 4 – CM1IF CMP1 Interrupt Flag
Value | Description |
---|---|
1 | Interrupt has occurred (must be cleared by software) |
0 | Interrupt event has not occurred |
Bit 3 – ACTIF Active Clock Tuning Interrupt Flag
Value | Description |
---|---|
1 | Interrupt has occurred (must be cleared by software) |
0 | Interrupt event has not occurred |
Bit 2 – ADIF ADC Interrupt Flag
Value | Description |
---|---|
1 | Interrupt has occurred (must be cleared by software) |
0 | Interrupt event has not occurred |
Bit 1 – ADCH1IF ADC Context 1 Threshold Interrupt Flag
Value | Description |
---|---|
1 | Interrupt event has not occurred |
0 | Interrupt has occurred |
Bit 0 – INT0IF External Interrupt 0 Interrupt Flag(2)
Value | Description |
---|---|
1 | Interrupt has occurred (must be cleared by software) |
0 | Interrupt event has not occurred |