7.5.2 Exit Debug Mode

The processor exits the Debug state:

• When the debugger writes 0 to DHCSR.C_HALT
• On receipt of an external restart request

If software clears DHCSR.C_HALT to 0 when the processor is in the Debug state, a subsequent read of the DHCSR that returns 1 for both C_HALT and S_HALT indicates that the processor has re-entered the Debug state because it has detected a new debug event.

For more details, refer to the ARMv7-M Architecture Reference Manual - ARM DDI 0403E, Debug stepping control using the DHCSR table.