44.2 Rev. B - 05/2018

Section	Changes
Document	The status changed from Preliminary to Complete
Features	Removed the Data retention: 20 years at 85°C Speed Grade corrected to: 0-8 MHz @ 2.7V – 5.5V
MEMORIES: Configuration and User Fuses (FUSE)	Updated the description of Bit 7 – OSCLOCK Oscillator Lock and Bits 1:0 – FREQSEL[1:0] Frequency Select in the OSCCFG: Oscillator Configuration Register
Peripherals and Architecture	Added DC0 in Peripheral Module Address Map
TCD: 12-Bit Timer/Counter Type D	Fixed the 'Example Titles' in the Dithering and in TCD Counter Capture
DAC: Digital-to-Analog Converter	Added One Instance DAC0in the Features
Electrical Characteristics: General Operating Ratings	Updated the temperature limits to [-40, 125]°C for the Maximum Frequency vs. V_DD
Electrical Characteristics: Wake-Up Time	Updated the conditions and the typical values for the Wake-up time from Idle mode
Electrical Characteristics: Power Consumption of Peripherals	Updated the Operating conditions to include the 'Idle Sleep Mode'
Electrical Characteristics: TWI	Updated the TWI - Timing Characteristics Removed the redundant unit mA from I_OL min

Document

Updated the description of Bit 7 – OSCLOCK Oscillator Lock and Bits 1:0 – FREQSEL[1:0] Frequency Select in the OSCCFG: Oscillator Configuration Register