50.4.4 I/O and CLKOUT Timing Specifications

Figure 50-6. CLKOUT and I/O Timing
Table 50-10. I/O and CLKOUT Timing Specifications
Standard Operating Conditions (unless otherwise stated)
Param No.Sym.CharacteristicMin.Typ. †Max.UnitsConditions
IO1*TCLKOUTHCLKOUT rising edge delay (rising edge FOSC (Q1 cycle) to falling edge CLKOUT——70ns
IO2*TCLKOUTLCLKOUT falling edge delay (rising edge FOSC (Q3 cycle) to rising edge CLKOUT——72ns
IO3*TIO_VALIDPort output valid time (rising edge FOSC (Q1 cycle) to port valid)—5070ns
IO4*TIO_SETUPPort input setup time (Setup time before rising edge FOSC – Q2 cycle)20——ns
IO5*TIO_HOLDPort input hold time (Hold time after rising edge FOSC – Q2 cycle)50——ns
IO6*TIOR_SLRENPort I/O rise time, slew rate enabled—25—nsVDD = 3.0V
IO7*TIOR_SLRDISPort I/O rise time, slew rate disabled—5—nsVDD = 3.0V
IO8*TIOF_SLRENPort I/O fall time, slew rate enabled—25—nsVDD = 3.0V
IO9*TIOF_SLRDISPort I/O fall time, slew rate disabled—5—nsVDD = 3.0V
IO10*TINTINT pin high or low time to trigger an interrupt25——ns
IO11*TIOCInterrupt-on-Change minimum high or low time to trigger interrupt25——ns

* These parameters are characterized but not tested.