50.4.8 Analog-to-Digital Converter (ADC) Conversion Timing Specifications

Table 50-14. 
Standard Operating Conditions (unless otherwise stated)
Param No.Sym.CharacteristicMin.Typ. †Max.UnitsConditions
AD20TADADC Clock Period0.5—9μsUsing FOSC as the ADC clock source CS = 0
—2—μsUsing ADCRC as the ADC clock source CS = 1
AD21TCNVConversion Time—14 TAD+2TCY——Using FOSC as the ADC clock source CS = 0
—16 TAD+2TCY——Using ADCRC as the ADC clock source CS = 1
AD22THCDSample-and-Hold Capacitor Disconnect Time—2 TAD+1TCY——Using FOSC as the ADC clock source CS = 0
—3 TAD+2TCY——Using ADCRC as the ADC clock source CS = 1

* These parameters are characterized but not tested.

† Data in “Typ” column is at 3.0V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested.

Figure 50-9. ADC Conversion Timing (ADC Clock FOSC-Based)
Figure 50-10. ADC Conversion Timing (ADC Clock from ADCRC)